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Here is a list of the more common errors you might see generated by
make, and some information about what they mean and how to fix
them.
Sometimes make errors are not fatal, especially in the presence
of a - prefix on a command script line, or the -k command
line option. Errors that are fatal are prefixed with the string
***.
Error messages are all either prefixed with the name of the program (usually `make'), or, if the error is found in a makefile, the name of the file and linenumber containing the problem.
In the table below, these common prefixes are left off.
make errors at all. They mean that a
program that make invoked as part of a command script returned a
non-0 error code (`Error NN'), which make interprets
as failure, or it exited in some other abnormal fashion (with a
signal of some type). See section Errors in Commands.
If no *** is attached to the message, then the subprocess failed
but the rule in the makefile was prefixed with the - special
character, so make ignored the error.
make could not understand much of anything about
the command line it just read. GNU make looks for various kinds
of separators (:, =, TAB characters, etc.) to help it
decide what kind of commandline it's seeing. This means it couldn't
find a valid one.
One of the most common reasons for this message is that you (or perhaps
your oh-so-helpful editor, as is the case with many MS-Windows editors)
have attempted to indent your command scripts with spaces instead of a
TAB character. In this case, make will use the second form of
the error above. Remember that every line in the command script must
begin with a TAB character. Eight spaces do not count. See section Rule Syntax.
make command (such as a variable assignment). Command scripts
must always be associated with a target.
The second form is generated if the line has a semicolon as the first
non-whitespace character; make interprets this to mean you left
out the "target: prerequisite" section of a rule. See section Rule Syntax.
make decided it needed to build a target, but
then couldn't find any instructions in the makefile on how to do that,
either explicit or implicit (including in the default rules database).
If you want that file to be built, you will need to add a rule to your
makefile describing how that target can be built. Other possible
sources of this problem are typos in the makefile (if that filename is
wrong) or a corrupted source tree (if that file is not supposed to be
built, but rather only a prerequisite).
make couldn't find any makefiles to read in.
The latter means that some makefile was found, but it didn't contain any
default target and none was given on the command line. GNU make
has nothing to do in these situations.
See section Arguments to Specify the Makefile.
make allows commands to be specified only once per target
(except for double-colon rules). If you give commands for a target
which already has been defined to have commands, this warning is issued
and the second set of commands will overwrite the first set.
See section Multiple Rules for One Target.
make detected a loop in the dependency graph:
after tracing the prerequisite yyy of target xxx, and its
prerequisites, etc., one of them depended on xxx again.
make variable
xxx that, when it's expanded, will refer to itself (xxx).
This is not allowed; either use simply-expanded variables (:=) or
use the append operator (+=). See section How to Use Variables.
%). See section Syntax of Static Pattern Rules.
make detects error
conditions related to parallel processing on systems where
sub-makes can communicate (see section Communicating Options to a Sub-make). This warning is
generated if a recursive invocation of a make process is forced
to have `-jN' in its argument list (where N is greater
than one). This could happen, for example, if you set the MAKE
environment variable to `make -j2'. In this case, the
sub-make doesn't communicate with other make processes and
will simply pretend it has two jobs of its own.
make processes to communicate, the parent will pass
information to the child. Since this could result in problems if the
child process isn't actually a make, the parent will only do this
if it thinks the child is a make. The parent uses the normal
algorithms to determine this (see section How the MAKE Variable Works). If the makefile is constructed such that the parent
doesn't know the child is a make process, then the child will
receive only part of the information necessary. In this case, the child
will generate this warning message and proceed with its build in a
sequential manner.
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