This is the Verilog::Pli Perl Package.

Copyright
=========

   This package is Copyright 2000 by Wilson Snyder
<wsnyder@wsnyder.org>.

   You may distribute under the terms of either the GNU General Public
License or the Perl Artistic License, as specified in the Perl README
file, with the exception that it cannot be placed on a CD-ROM or similar
media for commercial distribution without the prior approval of the
author.

   This code is provided with no warranty of any kind, and is used
entirely at your own risk.

Description
===========

   This package provides access to Verilog PLI routines from within
Perl.

       $NET{a_signal} = 1
       do_stop();

   See `man Verilog::Pli' after installation.

Obtaining Distribution
======================

   The latest version is available at `http://www.perl.org/CPAN/'

   Download the latest package from that site, and decompress.  `gunzip
Verilog-Pli_version.tar.gz ; tar xvf Verilog-Pli_version.tar'

Supported Systems
=================

   This version of Verilog::Pli has been built and tested on:

   * sparc-sun-solaris2.6

   * i686-linux-2.2.5

   It should run on any system with Perl and VCS or other Verilog
simulator with minor porting.

Installation
============

  1. `cd' to the directory containing this INSTALL notice.

  2. Type `perl Makefile.PL' to configure Verilog::Pli for your system.

  3. Type `make' to compile Verilog::Pli.

  4. Type `make install' to install the programs and any data files and
     documentation.

  5. If you have VCS, `cd example ; make' to see an example.


Interpreter
===========

   You will need a perl interpreter inside your simulator to make this
package useful.  A example verilog file, pli C wrapper and all is inside
the example directory.  This example uses VCS, but will work with minor
modifications with Verilog-XL and other Verilog simulators with a PLI.

  1. cd example

  2. make


   Thanks to Tom Kraljevic <tomk@titanic.Abrizio.COM> for this example.