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Re: [oc] vhdl to verilog converter

To: cores@opencores.org
Subject: Re: [oc] vhdl to verilog converter
From: Joachim Strömbergson<Joachim.Strombergson@InformAsic.com>
Date: Thu, 19 Sep 2002 09:10:58 +0200
References: <200209182025.g8IKPgk10636@www.lampret.com>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org
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Aloha!

phamquang@hotmail.com wrote:
>   Hi,
>    I'm looking for a software to convert from VHDL to Verilog. Please help.

Goering had an article about an open source VHDL->Verilog tool in EE Times 
just a few days ago:

http://www.eedesign.com/story/OEG20020916S0077

You can download the tool here:
http://www.ocean-logic.com/downloads.htm

I tried it on a VHDL block we have here, but ran into problems basically at 
once. I haven't investigated why (gav it 5 secs which really isn't fair to the 
tool). You might have a better run with. Good luck!

-- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
VP, Research & Development
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InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden
Tel: +46 31 68 54 90  Fax: +46 31 68 54 91  Mobile: +46 733 75 97 02
E-mail: joachim.strombergson@informasic.com  Home: www.informasic.com


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References:
- [oc] vhdl to verilog converter
  - From: phamquang@hotmail.com

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