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[cvs-checkins] uart16550/bench/verilog readme.txt uart_device ...

CVSROOT:	/home/oc/cvs
Module name:	uart16550
Changes by:	mohor	02/01/25 09:55:03

Added files:
	bench/verilog  : readme.txt uart_device_if.v 
	                 uart_device_if_defines.v 
	                 uart_device_if_memory.v vapi.log 

Log message:
	UART PHY added. Files are fully operational, working on HW.

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