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[cvs-checkins] or1k/xess/xsv_fpga/orp_soc/syn/design_compiler ...



CVSROOT:	/home/oc/cvs
Module name:	or1k
Changes by:	lampret	02/03/28 21:20:33

Added files:
	xess/xsv_fpga/orp_soc/syn/design_compiler.old/bin: 
	                                                   cons_art_umc18.inc 
	                                                   cons_vs_umc18.inc 
	                                                   read_design.inc 
	                                                   reports.inc 
	                                                   save_design.inc 
	                                                   select_tech.inc 
	                                                   set_env.inc 
	                                                   tech_art_umc18.inc 
	                                                   tech_vs_umc18.inc 
	                                                   top.scr 
	xess/xsv_fpga/orp_soc/syn/design_compiler.old/run: dodesign 

Log message:
	Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well.

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