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[cvs-checkins] ethernet/rtl/verilog eth_top.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] ethernet/rtl/verilog eth_top.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Wed, 13 Nov 2002 21:25:37 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	ethernet
Changes by:	tadejm	02/11/13 21:25:37

Modified files:
	rtl/verilog    : eth_top.v 

Log message:
	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.

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