[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[cvs-checkins] mlite/vhdl reg_bank.vhd



CVSROOT:	/home/oc/cvs
Module name:	mlite
Changes by:	rhoads	03/03/11 04:40:42

Modified files:
	vhdl           : reg_bank.vhd 

Log message:
	changed interrupt vector from 0x30 to 0x3c

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml