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Re: [fpu] fdiv problem



The problem with Rudi's pattern generator that it does
not give numbers that we can understand (only for the
test bench)
what I want is a verification software at least to
generate the patterns, perform the operation and
display the results of the sofwtare and the fp
execution unit (may be later we can also make
automatic checking)
Exceptions also are very important to check so they
must be predicted.

I need this software as soon as possible. If you do
not have time I can work on that part if no one is
working on it now


Anyhow I need the test bench and the pattern reader so
as to interface it to the divider. 

Jamil Khatib
--- Damjan Lampret <damjanlampret@yahoo.com> wrote:
> What happens if you use Rudi's pattern generator?
> 
> regards,
> Damjan
> 
> --- Jamil Khatib <jamilkhatib75@yahoo.com> wrote:
> > OK no problem I'll start working on the conversion
> > block as soon as I finish the fdiv.
> > Currently I have some problems with the fdiv it
> does
> > not produce teh same results as the MS-calculator
> > 
> > for example when I do 8388616/8388610 or
> > 2147485696/2147484160  on a normalized format I
> get 1
> > denormalized format but the result from
> MS-calculator
> > is 1.0000007152555667744715751477301
> > 
> > I got this result before conversion back from
> extended
> > format to single precision
> 
> 
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