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Re: [openrisc] Trap exception revisited...
Damjan Lampret wrote:
>
> In trap case, K identifies SR bit and if it is set, causes a trap exception.
>
> This way you can check carry, overflow bits and also implement range
> checking together with sfXX instructions (by checking condition flag).
>
> > > l.trap K
> > >
> > > if SR[K]==1 then breakpoint-exception(K)
>
> Should read something like (K != X)):
> if SR[K]==1 then trap-exception(X)
Ok, we will then say SR[12] = 1,
and l.trap 4096 will cause normal breakpoint.
Chris, can you add this change to gdb, please?
Marko
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