Re: [openrisc] l.trap instruction argument ?

["Damjan Lampret" <lampret@opencores.org>]

Scott,

l.trap was indeed implemented as uncondictional because initally this
instruction was called l.brk and used only fro breakpoints. So right now
or1200 RTL and or1ksim still treat this instruction as uncondutional while
the manual already describes it as conditional. So manual is more accurate,
but you know what they say, if it will never be changedin or1200 and
or1ksim, it just might be easier to change the manual.

regards,
Damjan

----- Original Message -----
From: "Scott Furman" <sfurman@rosum.com>
To: <openrisc@opencores.org>
Sent: Tuesday, February 11, 2003 9:40 PM
Subject: [openrisc] l.trap instruction argument ?


> I noticed an inconsistency between the or1k architecture manual and the
> simulator/hardware.  As far as I can tell from reading the code, l.trap
> is unconditional in both the simulator and the or1200 implementation.
> In the architecture manual, it is described as a trap exception that is
> conditionally taken depending on the state of a bit in the SR register.
> Which is correct ?
>
> -Scott
>
>
>
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