24 #include "../SDL_internal.h"
28 #if defined(__WIN32__)
29 #include "../core/windows/SDL_windows.h"
34 #ifndef QSV_NUMPROCESSORS
35 #define QSV_NUMPROCESSORS 26
47 #ifdef HAVE_SYSCTLBYNAME
48 #include <sys/types.h>
49 #include <sys/sysctl.h>
51 #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
52 #include <sys/sysctl.h>
53 #elif defined(__OpenBSD__) && defined(__powerpc__)
54 #include <sys/param.h>
55 #include <sys/sysctl.h>
56 #include <machine/cpu.h>
57 #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
62 #if defined(__QNXNTO__)
63 #include <sys/syspage.h>
66 #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
72 #define HWCAP_NEON (1 << 12)
74 #if defined HAVE_GETAUXVAL
81 #define CPU_HAS_RDTSC (1 << 0)
82 #define CPU_HAS_ALTIVEC (1 << 1)
83 #define CPU_HAS_MMX (1 << 2)
84 #define CPU_HAS_3DNOW (1 << 3)
85 #define CPU_HAS_SSE (1 << 4)
86 #define CPU_HAS_SSE2 (1 << 5)
87 #define CPU_HAS_SSE3 (1 << 6)
88 #define CPU_HAS_SSE41 (1 << 7)
89 #define CPU_HAS_SSE42 (1 << 8)
90 #define CPU_HAS_AVX (1 << 9)
91 #define CPU_HAS_AVX2 (1 << 10)
92 #define CPU_HAS_NEON (1 << 11)
93 #define CPU_HAS_AVX512F (1 << 12)
95 #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
99 static jmp_buf jmpbuf;
101 illegal_instruction(
int sig)
113 #ifndef SDL_CPUINFO_DISABLED
114 #if defined(__GNUC__) && defined(i386)
116 " pushfl # Get original EFLAGS \n"
118 " movl %%eax,%%ecx \n"
119 " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
120 " pushl %%eax # Save new EFLAGS value on stack \n"
121 " popfl # Replace current EFLAGS value \n"
122 " pushfl # Get new EFLAGS \n"
123 " popl %%eax # Store new EFLAGS in EAX \n"
124 " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
125 " jz 1f # Processor=80486 \n"
126 " movl $1,%0 # We have CPUID support \n"
132 #elif defined(__GNUC__) && defined(__x86_64__)
136 " pushfq # Get original EFLAGS \n"
138 " movq %%rax,%%rcx \n"
139 " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
140 " pushq %%rax # Save new EFLAGS value on stack \n"
141 " popfq # Replace current EFLAGS value \n"
142 " pushfq # Get new EFLAGS \n"
143 " popq %%rax # Store new EFLAGS in EAX \n"
144 " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
145 " jz 1f # Processor=80486 \n"
146 " movl $1,%0 # We have CPUID support \n"
152 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
154 pushfd ; Get original EFLAGS
157 xor eax, 200000
h ; Flip ID bit
in EFLAGS
158 push eax ; Save
new EFLAGS
value on stack
159 popfd ; Replace current EFLAGS
value
160 pushfd ; Get
new EFLAGS
161 pop eax ; Store
new EFLAGS
in EAX
162 xor eax, ecx ; Can not toggle ID bit,
163 jz
done ; Processor=80486
164 mov has_CPUID,1 ; We have CPUID support
167 #elif defined(_MSC_VER) && defined(_M_X64)
169 #elif defined(__sun) && defined(__i386)
174 " xorl $0x200000,%eax \n"
181 " movl $1,-8(%ebp) \n"
184 #elif defined(__sun) && defined(__amd64)
189 " xorl $0x200000,%eax \n"
196 " movl $1,-8(%rbp) \n"
205 #if defined(__GNUC__) && defined(i386)
206 #define cpuid(func, a, b, c, d) \
207 __asm__ __volatile__ ( \
209 " xorl %%ecx,%%ecx \n" \
211 " movl %%ebx, %%esi \n" \
213 "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
214 #elif defined(__GNUC__) && defined(__x86_64__)
215 #define cpuid(func, a, b, c, d) \
216 __asm__ __volatile__ ( \
218 " xorq %%rcx,%%rcx \n" \
220 " movq %%rbx, %%rsi \n" \
222 "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
223 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
224 #define cpuid(func, a, b, c, d) \
226 __asm mov eax, func \
234 #elif defined(_MSC_VER) && defined(_M_X64)
235 #define cpuid(func, a, b, c, d) \
238 __cpuid(CPUInfo, func); \
245 #define cpuid(func, a, b, c, d) \
246 do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
262 cpuid(0, a, b, c, d);
265 cpuid(1, a, b, c, d);
272 if (c & 0x08000000) {
274 #if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
275 __asm__(
".byte 0x0f, 0x01, 0xd0" :
"=a" (a) :
"c" (0) :
"%edx");
276 #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219)
278 #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
282 _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
297 volatile int altivec = 0;
298 #ifndef SDL_CPUINFO_DISABLED
299 #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
301 int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
303 int selectors[2] = { CTL_HW, HW_VECTORUNIT };
305 int hasVectorUnit = 0;
306 size_t length =
sizeof(hasVectorUnit);
307 int error = sysctl(selectors, 2, &hasVectorUnit, &length,
NULL, 0);
309 altivec = (hasVectorUnit != 0);
310 #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
311 void (*handler) (
int sig);
312 handler = signal(SIGILL, illegal_instruction);
313 if (setjmp(jmpbuf) == 0) {
314 asm volatile (
"mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::
"r" (-1));
317 signal(SIGILL, handler);
323 #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
325 readProcAuxvForNeon(
void)
329 const int fd = open(
"/proc/self/auxv", O_RDONLY);
331 while (read(fd, kv,
sizeof (kv)) ==
sizeof (kv)) {
332 if (kv[0] == AT_HWCAP) {
333 neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
349 #if defined(SDL_CPUINFO_DISABLED) || !defined(__ARM_ARCH)
351 #elif __ARM_ARCH >= 8
353 #elif defined(__APPLE__) && (__ARM_ARCH >= 7)
356 #elif defined(__APPLE__)
358 #elif defined(__QNXNTO__)
359 return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
360 #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
361 return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
362 #elif (defined(__LINUX__) || defined(__ANDROID__))
363 return readProcAuxvForNeon();
364 #elif (defined(__WINDOWS__) || defined(__WINRT__)) && defined(_M_ARM)
366 return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
368 #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
378 cpuid(0x80000000, a, b, c, d);
379 if (a >= 0x80000001) {
380 cpuid(0x80000001, a, b, c, d);
381 return (d & 0x80000000);
387 #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
388 #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
389 #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
390 #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
391 #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
392 #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
393 #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
394 #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
402 cpuid(7, a, b, c, d);
403 return (b & 0x00000020);
414 cpuid(7, a, b, c, d);
415 return (b & 0x00010000);
426 #ifndef SDL_CPUINFO_DISABLED
427 #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
428 if (SDL_CPUCount <= 0) {
429 SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
432 #ifdef HAVE_SYSCTLBYNAME
433 if (SDL_CPUCount <= 0) {
435 sysctlbyname(
"hw.ncpu", &SDL_CPUCount, &size,
NULL, 0);
439 if (SDL_CPUCount <= 0) {
441 GetSystemInfo(&info);
442 SDL_CPUCount = info.dwNumberOfProcessors;
446 if (SDL_CPUCount <= 0) {
447 DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
448 &SDL_CPUCount,
sizeof(SDL_CPUCount) );
453 if (SDL_CPUCount <= 0) {
464 static char SDL_CPUType[13];
466 if (!SDL_CPUType[0]) {
472 cpuid(0x00000000, a, b, c, d);
474 SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
475 SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
476 SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
477 SDL_CPUType[i++] = (char)(b & 0xff);
479 SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
480 SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
481 SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
482 SDL_CPUType[i++] = (char)(d & 0xff);
484 SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
485 SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
486 SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
487 SDL_CPUType[i++] = (char)(c & 0xff);
489 if (!SDL_CPUType[0]) {
490 SDL_strlcpy(SDL_CPUType,
"Unknown",
sizeof(SDL_CPUType));
501 static char SDL_CPUName[48];
503 if (!SDL_CPUName[0]) {
509 cpuid(0x80000000, a, b, c, d);
510 if (a >= 0x80000004) {
511 cpuid(0x80000002, a, b, c, d);
512 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
513 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
514 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
515 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
516 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
517 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
518 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
519 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
520 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
521 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
522 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
523 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
524 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
525 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
526 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
527 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
528 cpuid(0x80000003, a, b, c, d);
529 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
530 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
531 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
532 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
533 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
534 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
535 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
536 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
537 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
538 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
539 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
540 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
541 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
542 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
543 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
544 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
545 cpuid(0x80000004, a, b, c, d);
546 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
547 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
548 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
549 SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
550 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
551 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
552 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
553 SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
554 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
555 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
556 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
557 SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
558 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
559 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
560 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
561 SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
564 if (!SDL_CPUName[0]) {
565 SDL_strlcpy(SDL_CPUName,
"Unknown",
sizeof(SDL_CPUName));
578 if (
SDL_strcmp(cpuType,
"GenuineIntel") == 0) {
579 cpuid(0x00000001, a, b, c, d);
580 return (((b >> 8) & 0xff) * 8);
581 }
else if (
SDL_strcmp(cpuType,
"AuthenticAMD") == 0) {
582 cpuid(0x80000005, a, b, c, d);
596 if (SDL_CPUFeatures == 0xFFFFFFFF) {
599 SDL_SIMDAlignment = 4;
605 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
609 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 8);
613 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 8);
617 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
621 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
625 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
629 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
633 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
637 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 32);
641 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 32);
645 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 64);
649 SDL_SIMDAlignment =
SDL_max(SDL_SIMDAlignment, 16);
655 #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
739 if (!SDL_SystemRAM) {
740 #ifndef SDL_CPUINFO_DISABLED
741 #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
742 if (SDL_SystemRAM <= 0) {
743 SDL_SystemRAM = (int)((
Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
746 #ifdef HAVE_SYSCTLBYNAME
747 if (SDL_SystemRAM <= 0) {
748 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__)
750 int mib[2] = {CTL_HW, HW_REALMEM};
753 int mib[2] = {CTL_HW, HW_PHYSMEM};
756 int mib[2] = {CTL_HW, HW_MEMSIZE};
759 size_t len =
sizeof(memsize);
761 if (sysctl(mib, 2, &memsize, &len,
NULL, 0) == 0) {
762 SDL_SystemRAM = (int)(memsize / (1024*1024));
767 if (SDL_SystemRAM <= 0) {
769 stat.dwLength =
sizeof(stat);
770 if (GlobalMemoryStatusEx(&stat)) {
771 SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
776 if (SDL_SystemRAM <= 0) {
778 DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
779 SDL_SystemRAM = (int) (sysram / 0x100000U);
791 if (SDL_SIMDAlignment == 0xFFFFFFFF) {
802 const size_t padding = alignment - (len % alignment);
803 const size_t padded = (padding != alignment) ? (len + padding) :
len;
808 retval = ptr +
sizeof (
void *);
809 retval += alignment - (((
size_t) retval) % alignment);
810 *(((
void **) retval) - 1) = ptr;
819 void **realptr = (
void **) ptr;
835 printf(
"CPU name: %s\n", SDL_GetCPUName());
void SDL_SIMDFree(void *ptr)
Deallocate memory obtained from SDL_SIMDAlloc.
static SDL_bool CPU_OSSavesYMM
SDL_bool SDL_HasSSE41(void)
static void CPU_calcCPUIDFeatures(void)
int SDL_GetCPUCount(void)
static const char * SDL_GetCPUType(void)
GLfloat GLfloat GLfloat GLfloat h
SDL_bool SDL_HasAVX512F(void)
SDL_bool SDL_HasSSE(void)
SDL_bool SDL_HasSSE3(void)
static int CPU_CPUIDMaxFunction
static int CPU_have3DNow(void)
void * SDL_SIMDAlloc(const size_t len)
Allocate memory in a SIMD-friendly way.
SDL_bool SDL_HasAltiVec(void)
static int CPU_haveCPUID(void)
SDL_bool SDL_HasSSE42(void)
SDL_bool SDL_HasMMX(void)
SDL_bool SDL_HasAVX2(void)
static int CPU_haveAltiVec(void)
static int CPU_haveAVX512F(void)
static SDL_bool CPU_OSSavesZMM
return Display return Display Bool Bool int int int return Display XEvent Bool(*) XPointer return Display return Display Drawable _Xconst char unsigned int unsigned int return Display Pixmap Pixmap XColor XColor unsigned int unsigned int return Display _Xconst char char int char return Display Visual unsigned int int int char unsigned int unsigned int in i)
#define CPU_FEATURE_AVAILABLE(f)
SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char const char SDL_SCANF_FORMAT_STRING const char return SDL_ThreadFunction const char void return Uint32 return Uint32 SDL_AssertionHandler void SDL_SpinLock SDL_atomic_t int int return SDL_atomic_t return void void void return void return int return SDL_AudioSpec SDL_AudioSpec return int int return return int SDL_RWops int SDL_AudioSpec Uint8 ** d
SDL_bool SDL_HasNEON(void)
#define SDL_CACHELINE_SIZE
GLsizei const GLfloat * value
#define cpuid(func, a, b, c, d)
SDL_bool SDL_HasAVX(void)
static Uint32 SDL_CPUFeatures
static Uint32 SDL_GetCPUFeatures(void)
static int CPU_haveAVX2(void)
#define SDL_assert(condition)
static int CPU_haveNEON(void)
SDL_bool SDL_HasRDTSC(void)
SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char int SDL_PRINTF_FORMAT_STRING const char const char SDL_SCANF_FORMAT_STRING const char return SDL_ThreadFunction const char void return Uint32 return Uint32 void
int SDL_GetSystemRAM(void)
static Uint32 SDL_SIMDAlignment
size_t SDL_SIMDGetAlignment(void)
Report the alignment this system needs for SIMD allocations.
static int CPU_CPUIDFeatures[4]
GLuint GLsizei GLsizei * length
GLboolean GLboolean GLboolean GLboolean a
SDL_bool SDL_HasSSE2(void)
GLboolean GLboolean GLboolean b
SDL_bool SDL_Has3DNow(void)
int SDL_GetCPUCacheLineSize(void)