Definition in file pm_example2.c.
#include "gpio.h"
#include "pm_at32ap7000.h"
#include "board.h"
Go to the source code of this file.
Defines | |
Generic Clock Configuration | |
#define | EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_0_FUNCTION |
#define | EXAMPLE_GCLK_ID 0 |
#define | EXAMPLE_GCLK_PIN AVR32_PM_GCLK_0_PIN |
Functions | |
void | local_start_pll0 () |
int | main (void) |
static void | software_delay (void) |
#define EXAMPLE_GCLK_FUNCTION AVR32_PM_GCLK_0_FUNCTION |
#define EXAMPLE_GCLK_ID 0 |
#define EXAMPLE_GCLK_PIN AVR32_PM_GCLK_0_PIN |
void local_start_pll0 | ( | ) |
Definition at line 115 of file pm_example2.c.
References EXAMPLE_GCLK_FUNCTION, EXAMPLE_GCLK_ID, EXAMPLE_GCLK_PIN, PM_HSB_DOMAIN, PM_PBA_DOMAIN, PM_PBB_DOMAIN, PM_PLL0, pm_reset(), pm_set_clock_domain_scaler(), pm_set_mclk_source(), pm_start_generic_clock(), and pm_start_pll().
Referenced by main().
00116 { 00117 // Reset PM. Makes sure we get the expected clocking after a soft reset (e.g.: JTAG reset) 00118 pm_reset(); 00119 00120 // Start PLL0 giving 100 MHz clock 00121 pm_pll_opt_t pm_pll_opt = { 00122 .pll_id = 0, 00123 .mul = 5, 00124 .div = 1, 00125 .osc_id = 0, 00126 .count = 16, 00127 .wait_for_lock = 1, 00128 }; 00129 pm_start_pll(&pm_pll_opt); 00130 00131 // Divide HSB by 2, PBA by 4 and PBB by 2 to keep them below maximum ratings 00132 pm_set_clock_domain_scaler(PM_HSB_DOMAIN, 2); 00133 pm_set_clock_domain_scaler(PM_PBB_DOMAIN, 2); 00134 pm_set_clock_domain_scaler(PM_PBA_DOMAIN, 4); 00135 00136 /* Setup generic clock on PLL0, with Osc0/PLL0, no divisor */ 00137 pm_gen_clk_opt_t pm_gen_clk_opt = { 00138 .clock_source = PM_PLL0, 00139 .divider = 0, 00140 }; 00141 pm_start_generic_clock(EXAMPLE_GCLK_ID, &pm_gen_clk_opt); 00142 00143 /* Set the GCLOCK function to the GPIO pin */ 00144 gpio_enable_module_pin(EXAMPLE_GCLK_PIN, EXAMPLE_GCLK_FUNCTION); 00145 00146 // Use PLL0 as clock source 00147 pm_set_mclk_source(PM_PLL0); 00148 }
int main | ( | void | ) |
Definition at line 166 of file pm_example2.c.
References local_start_pll0(), and software_delay().
00167 { 00168 /* start PLL0 and switch main clock to PLL0 output */ 00169 /* Also set-up a generic clock from PLL0 and output it to a gpio pin. */ 00170 local_start_pll0(); 00171 00172 LED_Off(0xff); 00173 00174 /* Now toggle LED0 using a GPIO */ 00175 while(1) 00176 { 00177 LED_Toggle(LED0); 00178 software_delay(); 00179 } 00180 }
static void software_delay | ( | void | ) | [static] |