From 517e95cb103d590587100bd284ac9cd7e804fc17 Mon Sep 17 00:00:00 2001 From: Kedar Sovani Date: Sun, 23 Nov 2008 22:37:44 -0500 Subject: [PATCH] elfutils: improve ARM support somewhat The ARM support in elfutils is somewhat lacking. This patch sends it into the right general direction -- although it's then still not entirely there yet. Signed-off-by: Lennert Buytenhek Signed-off-by: Kedar Sovani --- elfutils-0.137-arm.patch | 636 ++++++++++++++++++++++++++++++++++++++++++++++ elfutils.spec | 19 ++- 2 files changed, 652 insertions(+), 3 deletions(-) create mode 100644 elfutils-0.137-arm.patch diff --git a/elfutils-0.137-arm.patch b/elfutils-0.137-arm.patch new file mode 100644 index 0000000..2f14f4f --- /dev/null +++ b/elfutils-0.137-arm.patch @@ -0,0 +1,636 @@ +diff -Naurp elfutils-0.137.orig/backends/arm_init.c elfutils-0.137/backends/arm_init.c +--- elfutils-0.137.orig/backends/arm_init.c 2007-10-20 23:43:49.000000000 -0400 ++++ elfutils-0.137/backends/arm_init.c 2008-11-23 22:31:32.000000000 -0500 +@@ -32,6 +32,8 @@ + #define RELOC_PREFIX R_ARM_ + #include "libebl_CPU.h" + ++#include "libebl_arm.h" ++ + /* This defines the common reloc hooks based on arm_reloc.def. */ + #include "common-reloc.c" + +@@ -51,6 +53,20 @@ arm_init (elf, machine, eh, ehlen) + eh->name = "ARM"; + arm_init_reloc (eh); + HOOK (eh, reloc_simple_type); ++ HOOK (eh, segment_type_name); ++ HOOK (eh, section_type_name); ++ HOOK (eh, machine_flag_check); ++ HOOK (eh, register_info); ++ ++ if (elf) ++ { ++ GElf_Ehdr ehdr_mem; ++ GElf_Ehdr *ehdr = gelf_getehdr (elf, &ehdr_mem); ++ if (ehdr && (ehdr->e_flags & EF_ARM_SOFT_FLOAT)) ++ eh->return_value_location = arm_return_value_location_soft; ++ else ++ eh->return_value_location = arm_return_value_location_hard; ++ } + + return MODVERSION; + } +diff -Naurp elfutils-0.137.orig/backends/arm_regs.c elfutils-0.137/backends/arm_regs.c +--- elfutils-0.137.orig/backends/arm_regs.c 1969-12-31 19:00:00.000000000 -0500 ++++ elfutils-0.137/backends/arm_regs.c 2008-11-23 22:31:32.000000000 -0500 +@@ -0,0 +1,194 @@ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++#include ++#include ++ ++#define BACKEND arm_ ++#include "libebl_CPU.h" ++ ++ssize_t ++arm_register_info (Ebl *ebl __attribute__((unused)), ++ int regno, char *name, size_t namelen, ++ const char **prefix, const char **setname, ++ int *bits, int *type) ++{ ++ if (name == NULL) ++ return 288; ++ ++ if (regno < 0 || regno > 287 || namelen < 9) ++ return -1; ++ ++ *prefix = NULL; ++ ++ *type = DW_ATE_unsigned; ++ if (regno < 16) ++ { ++ *setname = "integer"; ++ *bits = 32; ++ if (regno < 13) ++ *type = DW_ATE_signed; ++ else ++ *type = DW_ATE_address; ++ } ++ else if (regno < 24) ++ { ++ *setname = "FPA"; ++ *bits = 64; ++ *type = DW_ATE_float; ++ } ++ else if (regno >= 64 && regno < 96) ++ { ++ *setname = "VFP"; ++ *bits = 64; ++ *type = DW_ATE_float; ++ } ++ else if (regno >= 96 && regno < 104) ++ { ++ *setname = "FPA"; ++ *bits = 64; ++ *type = DW_ATE_float; ++ } ++ else if (regno >= 104 && regno < 128) ++ { ++ *setname = "MMX"; ++ *bits = 64; ++ } ++ else if (regno >= 128 && regno < 134) ++ { ++ *setname = "control"; ++ *bits = 32; ++ } ++ else if (regno >= 144 && regno < 166) ++ { ++ *setname = "integer"; ++ *bits = 32; ++ } ++ else if (regno >= 192 && regno < 200) ++ { ++ *setname = "MMX"; ++ *bits = 64; ++ } ++ else if (regno >= 256 && regno < 288) ++ { ++ *setname = "NEON"; ++ *bits = 64; ++ } ++ ++ switch (regno) ++ { ++ case 0 ... 9: ++ name[0] = 'r'; ++ name[1] = (regno - 0) + '0'; ++ namelen = 2; ++ break; ++ ++ case 10 ... 10 + 5: ++ name[0] = 'r'; ++ name[1] = '1'; ++ name[2] = (regno - 10) + '0'; ++ namelen = 3; ++ break; ++ ++ case 16 + 0 ... 16 + 7: ++ name[0] = 'f'; ++ name[1] = (regno - 16) + '0'; ++ namelen = 2; ++ break; ++ ++ case 64 + 0 ... 64 + 9: ++ name[0] = 's'; ++ name[1] = (regno - 64) + '0'; ++ namelen = 2; ++ break; ++ ++ case 64 + 10 ... 64 + 31: ++ name[0] = 's'; ++ name[1] = (regno - 64) / 10 + '0'; ++ name[2] = (regno - 64) % 10 + '0'; ++ namelen = 3; ++ break; ++ ++ case 96 + 0 ... 96 + 7: ++ name[0] = 'f'; ++ name[1] = (regno - 96) + '0'; ++ namelen = 2; ++ break; ++ ++ case 104 ... 104 + 7: ++ memcpy(name, "wcgr", 4); ++ name[4] = (regno - 104) + '0'; ++ namelen = 5; ++ break; ++ ++ case 112 + 0 ... 112 + 9: ++ name[0] = 'w'; ++ name[1] = 'r'; ++ name[2] = (regno - 112) + '0'; ++ namelen = 3; ++ break; ++ ++ case 112 + 10 ... 112 + 15: ++ name[0] = 'w'; ++ name[1] = 'r'; ++ name[2] = '1'; ++ name[3] = (regno - 112 - 10) + '0'; ++ namelen = 4; ++ break; ++ ++ case 128: ++ return stpcpy (name, "spsr") + 1 - name; ++ case 129: ++ return stpcpy (name, "spsr_fiq") + 1 - name; ++ case 130: ++ return stpcpy (name, "spsr_irq") + 1 - name; ++ case 131: ++ return stpcpy (name, "spsr_abt") + 1 - name; ++ case 132: ++ return stpcpy (name, "spsr_und") + 1 - name; ++ case 133: ++ return stpcpy (name, "spsr_svc") + 1 - name; ++ ++ case 144 ... 150: ++ return sprintf(name, "r%d_usr", (regno - 144) + 8) + 1; ++ case 151 ... 157: ++ return sprintf(name, "r%d_fiq", (regno - 151) + 8) + 1; ++ case 158 ... 159: ++ return sprintf(name, "r%d_irq", (regno - 158) + 13) + 1; ++ case 160 ... 161: ++ return sprintf(name, "r%d_abt", (regno - 160) + 13) + 1; ++ case 162 ... 163: ++ return sprintf(name, "r%d_und", (regno - 162) + 13) + 1; ++ case 164 ... 165: ++ return sprintf(name, "r%d_svc", (regno - 164) + 13) + 1; ++ ++ case 192 ... 199: ++ name[0] = 'w'; ++ name[1] = 'c'; ++ name[2] = (regno - 192) + '0'; ++ namelen = 3; ++ break; ++ ++ case 256 + 0 ... 256 + 9: ++ name[0] = 'd'; ++ name[1] = (regno - 256) + '0'; ++ namelen = 2; ++ break; ++ ++ case 256 + 10 ... 256 + 31: ++ name[0] = 'd'; ++ name[1] = (regno - 256) / 10 + '0'; ++ name[2] = (regno - 256) % 10 + '0'; ++ namelen = 3; ++ break; ++ ++ default: ++ *setname = NULL; ++ return 0; ++ } ++ ++ name[namelen++] = '\0'; ++ return namelen; ++} +diff -Naurp elfutils-0.137.orig/backends/arm_retval.c elfutils-0.137/backends/arm_retval.c +--- elfutils-0.137.orig/backends/arm_retval.c 1969-12-31 19:00:00.000000000 -0500 ++++ elfutils-0.137/backends/arm_retval.c 2008-11-23 22:31:32.000000000 -0500 +@@ -0,0 +1,149 @@ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++#include ++ ++#define BACKEND arm_ ++#include "libebl_CPU.h" ++ ++ ++/* r0, or up to r0, r1, r2, r3 */ ++static const Dwarf_Op loc_intreg[] = ++ { ++ { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 4 }, ++ { .atom = DW_OP_reg1 }, { .atom = DW_OP_piece, .number = 4 }, ++ { .atom = DW_OP_reg2 }, { .atom = DW_OP_piece, .number = 4 }, ++ { .atom = DW_OP_reg3 }, { .atom = DW_OP_piece, .number = 4 }, ++ }; ++#define nloc_intreg 1 ++#define nloc_intregs(n) (2*(n)) ++ ++/* f1 */ /* FIXME f0 can also have number 96 if program was compiled with -mabi=aapcs */ ++static const Dwarf_Op loc_fpreg[] = ++ { ++ { .atom = DW_OP_reg16 }, ++ }; ++#define nloc_fpreg 1 ++ ++/* The return value is a structure and is actually stored in stack space ++ passed in a hidden argument by the caller. But, the compiler ++ helpfully returns the address of that space in r0. */ ++static const Dwarf_Op loc_aggregate[] = ++ { ++ { .atom = DW_OP_breg0, .number = 0 } ++ }; ++#define nloc_aggregate 1 ++ ++static int ++arm_return_value_location_ (Dwarf_Die *functypedie, const Dwarf_Op **locp, int soft_float) ++{ ++ /* Start with the function's type, and get the DW_AT_type attribute, ++ which is the type of the return value. */ ++ ++ Dwarf_Attribute attr_mem; ++ Dwarf_Attribute *attr = dwarf_attr (functypedie, DW_AT_type, &attr_mem); ++ if (attr == NULL) ++ /* The function has no return value, like a `void' function in C. */ ++ return 0; ++ ++ Dwarf_Die die_mem; ++ Dwarf_Die *typedie = dwarf_formref_die (attr, &die_mem); ++ int tag = dwarf_tag (typedie); ++ ++ /* Follow typedefs and qualifiers to get to the actual type. */ ++ while (tag == DW_TAG_typedef ++ || tag == DW_TAG_const_type || tag == DW_TAG_volatile_type ++ || tag == DW_TAG_restrict_type || tag == DW_TAG_mutable_type) ++ { ++ attr = dwarf_attr (typedie, DW_AT_type, &attr_mem); ++ typedie = dwarf_formref_die (attr, &die_mem); ++ tag = dwarf_tag (typedie); ++ } ++ ++ switch (tag) ++ { ++ case -1: ++ return -1; ++ ++ case DW_TAG_subrange_type: ++ if (! dwarf_hasattr (typedie, DW_AT_byte_size)) ++ { ++ attr = dwarf_attr (typedie, DW_AT_type, &attr_mem); ++ typedie = dwarf_formref_die (attr, &die_mem); ++ tag = dwarf_tag (typedie); ++ } ++ /* Fall through. */ ++ ++ case DW_TAG_base_type: ++ case DW_TAG_enumeration_type: ++ case DW_TAG_pointer_type: ++ case DW_TAG_ptr_to_member_type: ++ { ++ Dwarf_Word size; ++ if (dwarf_formudata (dwarf_attr (typedie, DW_AT_byte_size, ++ &attr_mem), &size) != 0) ++ { ++ if (tag == DW_TAG_pointer_type || tag == DW_TAG_ptr_to_member_type) ++ size = 4; ++ else ++ return -1; ++ } ++ if (tag == DW_TAG_base_type) ++ { ++ Dwarf_Word encoding; ++ if (dwarf_formudata (dwarf_attr (typedie, DW_AT_encoding, ++ &attr_mem), &encoding) != 0) ++ return -1; ++ ++ if ((encoding == DW_ATE_float) && !soft_float) ++ { ++ *locp = loc_fpreg; ++ if (size <= 8) ++ return nloc_fpreg; ++ goto aggregate; ++ } ++ } ++ *locp = loc_intreg; ++ if (size <= 4) ++ return nloc_intreg; ++ if (size <= 8) ++ return nloc_intregs(2); ++ if (size <= 12) ++ return nloc_intregs(3); ++ if (size <= 16) ++ return nloc_intregs(4); ++ ++ /* Else fall through. */ ++ } ++ ++ case DW_TAG_structure_type: ++ case DW_TAG_class_type: ++ case DW_TAG_union_type: ++ case DW_TAG_array_type: ++ aggregate: ++ /* FIXME sometimes aggregates are returned in r0 (-mabi=aapcs) */ ++ *locp = loc_aggregate; ++ return nloc_aggregate; ++ } ++ ++ /* XXX We don't have a good way to return specific errors from ebl calls. ++ This value means we do not understand the type, but it is well-formed ++ DWARF and might be valid. */ ++ return -2; ++} ++ ++/* return location for -mabi=apcs-gnu -msoft-float */ ++int ++arm_return_value_location_soft (Dwarf_Die *functypedie, const Dwarf_Op **locp) ++{ ++ return arm_return_value_location_ (functypedie, locp, 1); ++} ++ ++/* return location for -mabi=apcs-gnu -mhard-float (current default) */ ++int ++arm_return_value_location_hard (Dwarf_Die *functypedie, const Dwarf_Op **locp) ++{ ++ return arm_return_value_location_ (functypedie, locp, 0); ++} +diff -Naurp elfutils-0.137.orig/backends/arm_symbol.c elfutils-0.137/backends/arm_symbol.c +--- elfutils-0.137.orig/backends/arm_symbol.c 2007-10-20 23:43:49.000000000 -0400 ++++ elfutils-0.137/backends/arm_symbol.c 2008-11-23 22:31:32.000000000 -0500 +@@ -34,6 +34,50 @@ + #define BACKEND arm_ + #include "libebl_CPU.h" + ++const char * ++arm_segment_type_name (int segment, char *buf __attribute__ ((unused)), ++ size_t len __attribute__ ((unused))) ++{ ++ switch (segment) ++ { ++ case PT_ARM_EXIDX: ++ return "PT_ARM_EXIDX"; ++ default: ++ break; ++ } ++ return NULL; ++} ++ ++/* Check whether machine flags are valid. */ ++bool ++arm_machine_flag_check (GElf_Word flags) ++{ ++ return ((flags &~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY | EF_ARM_INTERWORK | ++ EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT | EF_ARM_PIC | ++ EF_ARM_ALIGN8 | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI | ++ EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT | ++ EF_ARM_MAVERICK_FLOAT | EF_ARM_EABIMASK)) == 0); ++} ++ ++/* Return symbolic representation of section type. */ ++const char * ++arm_section_type_name (int type, ++ char *buf __attribute__ ((unused)), ++ size_t len __attribute__ ((unused))) ++{ ++ switch (type) ++ { ++ case SHT_ARM_EXIDX: ++ return "SHT_ARM_EXIDX"; ++ case SHT_ARM_PREEMPTMAP: ++ return "SHT_ARM_PREEMPTMAP"; ++ case SHT_ARM_ATTRIBUTES: ++ return "SHT_ARM_ATTRIBUTES"; ++ } ++ ++ return NULL; ++} ++ + /* Check for the simple reloc types. */ + Elf_Type + arm_reloc_simple_type (Ebl *ebl __attribute__ ((unused)), int type) +diff -Naurp elfutils-0.137.orig/backends/libebl_arm.h elfutils-0.137/backends/libebl_arm.h +--- elfutils-0.137.orig/backends/libebl_arm.h 1969-12-31 19:00:00.000000000 -0500 ++++ elfutils-0.137/backends/libebl_arm.h 2008-11-23 22:31:32.000000000 -0500 +@@ -0,0 +1,9 @@ ++#ifndef _LIBEBL_ARM_H ++#define _LIBEBL_ARM_H 1 ++ ++#include ++ ++extern int arm_return_value_location_soft(Dwarf_Die *, const Dwarf_Op **locp); ++extern int arm_return_value_location_hard(Dwarf_Die *, const Dwarf_Op **locp); ++ ++#endif +diff -Naurp elfutils-0.137.orig/backends/Makefile.am elfutils-0.137/backends/Makefile.am +--- elfutils-0.137.orig/backends/Makefile.am 2008-08-09 00:06:44.000000000 -0400 ++++ elfutils-0.137/backends/Makefile.am 2008-11-23 22:31:32.000000000 -0500 +@@ -85,7 +85,7 @@ alpha_SRCS = alpha_init.c alpha_symbol.c + libebl_alpha_pic_a_SOURCES = $(alpha_SRCS) + am_libebl_alpha_pic_a_OBJECTS = $(alpha_SRCS:.c=.os) + +-arm_SRCS = arm_init.c arm_symbol.c ++arm_SRCS = arm_init.c arm_symbol.c arm_regs.c arm_retval.c + libebl_arm_pic_a_SOURCES = $(arm_SRCS) + am_libebl_arm_pic_a_OBJECTS = $(arm_SRCS:.c=.os) + +diff -Naurp elfutils-0.137.orig/backends/Makefile.in elfutils-0.137/backends/Makefile.in +--- elfutils-0.137.orig/backends/Makefile.in 2008-08-26 22:56:04.000000000 -0400 ++++ elfutils-0.137/backends/Makefile.in 2008-11-23 22:31:32.000000000 -0500 +@@ -284,7 +284,7 @@ alpha_SRCS = alpha_init.c alpha_symbol.c + + libebl_alpha_pic_a_SOURCES = $(alpha_SRCS) + am_libebl_alpha_pic_a_OBJECTS = $(alpha_SRCS:.c=.os) +-arm_SRCS = arm_init.c arm_symbol.c ++arm_SRCS = arm_init.c arm_symbol.c arm_regs.c arm_retval.c + libebl_arm_pic_a_SOURCES = $(arm_SRCS) + am_libebl_arm_pic_a_OBJECTS = $(arm_SRCS:.c=.os) + sparc_SRCS = sparc_init.c sparc_symbol.c sparc_regs.c sparc_retval.c \ +diff -Naurp elfutils-0.137.orig/libelf/elf.h elfutils-0.137/libelf/elf.h +--- elfutils-0.137.orig/libelf/elf.h 2008-08-09 00:06:44.000000000 -0400 ++++ elfutils-0.137/libelf/elf.h 2008-11-23 22:31:32.000000000 -0500 +@@ -2186,21 +2186,42 @@ typedef Elf32_Addr Elf32_Conflict; + #define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */ + #define EF_ARM_NEW_ABI 0x80 + #define EF_ARM_OLD_ABI 0x100 ++#define EF_ARM_SOFT_FLOAT 0x200 ++#define EF_ARM_VFP_FLOAT 0x400 ++#define EF_ARM_MAVERICK_FLOAT 0x800 + + /* Other constants defined in the ARM ELF spec. version B-01. */ + /* NB. These conflict with values defined above. */ + #define EF_ARM_SYMSARESORTED 0x04 + #define EF_ARM_DYNSYMSUSESEGIDX 0x08 + #define EF_ARM_MAPSYMSFIRST 0x10 ++ ++/* Constants defined in AAELF. */ ++/* Note: Those are the only e_flags in the lastest ABI specification ++ * GENC 003538 v1.03 (2006-05-05) */ ++#define EF_ARM_BE8 0x00800000 /* Contains BE-8 code for ARM ++ * architecture v6 processor */ + #define EF_ARM_EABIMASK 0XFF000000 + + #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) + #define EF_ARM_EABI_UNKNOWN 0x00000000 + #define EF_ARM_EABI_VER1 0x01000000 + #define EF_ARM_EABI_VER2 0x02000000 ++#define EF_ARM_EABI_VER3 0x03000000 ++#define EF_ARM_EABI_VER4 0x04000000 ++#define EF_ARM_EABI_VER5 0x05000000 ++ ++/* EI_OSABI values */ ++#define ELFOSABI_ARM_AEABI 64 /* Contains symbol versioning. */ + + /* Additional symbol types for Thumb */ +-#define STT_ARM_TFUNC 0xd ++#define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */ ++#define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */ ++ ++/* Additional section types. */ ++#define SHT_ARM_EXIDX 0x70000001 /* Section holds ARM unwind info. */ ++#define SHT_ARM_PREEMPTMAP 0x70000002 /* Section pre-emption details. */ ++#define SHT_ARM_ATTRIBUTES 0x70000003 /* Section holds attributes. */ + + /* ARM-specific values for sh_flags */ + #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ +@@ -2210,9 +2231,22 @@ typedef Elf32_Addr Elf32_Conflict; + /* ARM-specific program header flags */ + #define PF_ARM_SB 0x10000000 /* Segment contains the location + addressed by the static base */ ++#define PF_ARM_PI 0x20000000 /* Segment is position-independent. */ ++#define PF_ARM_ABS 0x40000000 /* Segment must be loaded at its base ++ address. */ + + /* Processor specific values for the Phdr p_type field. */ +-#define PT_ARM_EXIDX 0x70000001 /* .ARM.exidx segment */ ++/* Frame unwind information */ ++#define PT_ARM_EXIDX (PT_LOPROC + 1) /* .ARM.exidx segment */ ++#define PT_ARM_UNWIND PT_ARM_EXIDX ++ ++ ++/* Processor specific values for the Dyn d_tag field. */ ++#define DT_ARM_RESERVED1 (DT_LOPROC + 0) ++#define DT_ARM_SYMTABSZ (DT_LOPROC + 1) ++#define DT_ARM_PREEMPTMAP (DT_LOPROC + 2) ++#define DT_ARM_RESERVED2 (DT_LOPROC + 3) ++#define DT_ARM_NUM 4 + + /* ARM relocs. */ + +@@ -2244,12 +2278,75 @@ typedef Elf32_Addr Elf32_Conflict; + #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ + #define R_ARM_GOT32 26 /* 32 bit GOT entry */ + #define R_ARM_PLT32 27 /* 32 bit PLT address */ ++#define R_ARM_CALL 28 ++#define R_ARM_JUMP24 29 ++#define R_ARM_THM_JUMP24 30 ++#define R_ARM_BASE_ABS 31 + #define R_ARM_ALU_PCREL_7_0 32 + #define R_ARM_ALU_PCREL_15_8 33 + #define R_ARM_ALU_PCREL_23_15 34 + #define R_ARM_LDR_SBREL_11_0 35 + #define R_ARM_ALU_SBREL_19_12 36 + #define R_ARM_ALU_SBREL_27_20 37 ++#define R_ARM_TARGET1 38 ++#define R_ARM_SBREL31 39 ++#define R_ARM_V4BX 40 ++#define R_ARM_TARGET2 41 ++#define R_ARM_PREL31 42 ++#define R_ARM_MOVW_ABS_NC 43 ++#define R_ARM_MOVT_ABS 44 ++#define R_ARM_MOVW_PREL_NC 45 ++#define R_ARM_MOVT_PREL 46 ++#define R_ARM_THM_MOVW_ABS_NC 47 ++#define R_ARM_THM_MOVT_ABS 48 ++#define R_ARM_THM_MOVW_PREL_NC 49 ++#define R_ARM_THM_MOVT_PREL 50 ++#define R_ARM_THM_JUMP19 51 ++#define R_ARM_THM_JUMP6 52 ++#define R_ARM_THM_ALU_PREL_11_0 53 ++#define R_ARM_THM_PC12 54 ++#define R_ARM_ABS32_NOI 55 ++#define R_ARM_REL32_NOI 56 ++#define R_ARM_ALU_PC_G0_NC 57 ++#define R_ARM_ALU_PC_G0 58 ++#define R_ARM_ALU_PC_G1_NC 59 ++#define R_ARM_ALU_PC_G1 60 ++#define R_ARM_ALU_PC_G2 61 ++#define R_ARM_LDR_PC_G1 62 ++#define R_ARM_LDR_PC_G2 63 ++#define R_ARM_LDRS_PC_G0 64 ++#define R_ARM_LDRS_PC_G1 65 ++#define R_ARM_LDRS_PC_G2 66 ++#define R_ARM_LDC_PC_G0 67 ++#define R_ARM_LDC_PC_G1 68 ++#define R_ARM_LDC_PC_G2 69 ++#define R_ARM_ALU_SB_G0_NC 70 ++#define R_ARM_ALU_SB_G0 71 ++#define R_ARM_ALU_SB_G1_NC 72 ++#define R_ARM_ALU_SB_G1 73 ++#define R_ARM_ALU_SB_G2 74 ++#define R_ARM_LDR_SB_G0 75 ++#define R_ARM_LDR_SB_G1 76 ++#define R_ARM_LDR_SB_G2 77 ++#define R_ARM_LDRS_SB_G0 78 ++#define R_ARM_LDRS_SB_G1 79 ++#define R_ARM_LDRS_SB_G2 80 ++#define R_ARM_LDC_G0 81 ++#define R_ARM_LDC_G1 82 ++#define R_ARM_LDC_G2 83 ++#define R_ARM_MOVW_BREL_NC 84 ++#define R_ARM_MOVT_BREL 85 ++#define R_ARM_MOVW_BREL 86 ++#define R_ARM_THM_MOVW_BREL_NC 87 ++#define R_ARM_THM_MOVT_BREL 88 ++#define R_ARM_THM_MOVW_BREL 89 ++/* 90-93 unallocated */ ++#define R_ARM_PLT32_ABS 94 ++#define R_ARM_GOT_ABS 95 ++#define R_ARM_GOT_PREL 96 ++#define R_ARM_GOT_BREL12 97 ++#define R_ARM_GOTOFF12 98 ++#define R_ARM_GOTRELAX 99 + #define R_ARM_GNU_VTENTRY 100 + #define R_ARM_GNU_VTINHERIT 101 + #define R_ARM_THM_PC11 102 /* thumb unconditional branch */ +@@ -2264,6 +2361,13 @@ typedef Elf32_Addr Elf32_Conflict; + static TLS block offset */ + #define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static + TLS block */ ++#define R_ARM_TLS_LDO12 109 ++#define R_ARM_TLS_LE12 110 ++#define R_ARM_TLS_IE12GP 111 ++/* 112 - 127 private range */ ++#define R_ARM_ME_TOO 128 /* obsolete */ ++ ++/* Where do those come from? */ + #define R_ARM_RXPC25 249 + #define R_ARM_RSBREL32 250 + #define R_ARM_THM_RPC22 251 diff --git a/elfutils.spec b/elfutils.spec index d2d3430..30023dd 100644 --- a/elfutils.spec +++ b/elfutils.spec @@ -25,17 +25,19 @@ Summary: A collection of utilities and DSOs to handle compiled objects Name: elfutils Version: %{eu_version} %if !%{compat} -Release: %{eu_release}%{?dist} +Release: %{eu_release}%{?dist}.fa2 %else -Release: 0.%{eu_release} +Release: 0.%{eu_release}.fa2 %endif License: GPLv2 with exceptions Group: Development/Tools URL: https://fedorahosted.org/elfutils/ Source: http://fedorahosted.org/releases/e/l/elfutils/%{name}-%{version}.tar.gz +Source1: elfutils-0.137-libcpu-arm-Makefile Patch1: elfutils-portability.patch Patch2: elfutils-robustify.patch Patch3: elfutils-0.137-fixes.patch +Patch4: elfutils-0.137-arm.patch Requires: elfutils-libelf-%{_arch} = %{version}-%{release} Requires: elfutils-libs-%{_arch} = %{version}-%{release} @@ -158,6 +160,7 @@ find . \( -name configure -o -name config.h.in \) -print | xargs touch %patch2 -p1 -b .robustify %patch3 -p1 -b .fixes +%patch4 -p1 -b .arm find . -name \*.sh ! -perm -0100 -print | xargs chmod +x @@ -174,12 +177,19 @@ RPM_OPT_FLAGS="$RPM_OPT_FLAGS -D__NO_INLINE__" %endif %configure CFLAGS="$RPM_OPT_FLAGS -fexceptions" +%ifarch %{arm} +/bin/cp -f %{SOURCE1} libcpu/Makefile +echo "int i386_disasm() { int b; } " > libcpu/a.c +echo "int x86_64_disasm() { int b; } " > libcpu/b.c +%endif make -s %{?_smp_mflags} %install rm -rf ${RPM_BUILD_ROOT} make -s install DESTDIR=${RPM_BUILD_ROOT} - +%ifarch %{arm} +rm -f %{_libdir}/elfutils/libebl_i386.so %{_libdir}/elfutils/libebl_x86_64.so +%endif chmod +x ${RPM_BUILD_ROOT}%{_prefix}/%{_lib}/lib*.so* chmod +x ${RPM_BUILD_ROOT}%{_prefix}/%{_lib}/elfutils/lib*.so* @@ -265,6 +275,9 @@ rm -rf ${RPM_BUILD_ROOT} %{_libdir}/libelf.a %changelog +* Tue Dec 9 2008 Kedar Sovani - 0.137-3.fa1 +- Include fixes for the arm architecture + * Wed Oct 1 2008 Roland McGrath - 0.137-3 - fix libdwfl regression (#462689) -- 1.5.3.3