Date: Wed, 14 Jan 1998 10:29:06 +0100 (CET) From: Geert Uytterhoeven To: Jes Sorensen cc: linux-m68k@lists.linux-m68k.org Subject: Re: L68K: 2.1.79 is out In-Reply-To: <199801131654.RAA09312@valhall.cern.ch> Sender: owner-linux-m68k@phil.uni-sb.de On Tue, 13 Jan 1998, Jes Sorensen wrote: > I have just released 2.1.79. > > The patches for 2.1.77 were rather big so I decided I'd better do a new > release pretty fast. > > This kernel should solve the IDE compile problem and besides that its IDE has some new problems: we don't have PCI, and I used the following workaround: --- m68k-2.1.79/drivers/block/ide-proc.c.orig Tue Jan 13 19:09:33 1998 +++ m68k-2.1.79/drivers/block/ide-proc.c Tue Jan 13 23:28:08 1998 @@ -419,6 +419,7 @@ static int proc_ide_write_settings (struct file *file, const char *buffer, unsigned long count, void *data) { +#ifdef CONFIG_PCI ide_drive_t *drive = (ide_drive_t *) data; ide_hwif_t *hwif = HWIF(drive); char name[MAX_LEN + 1]; @@ -509,6 +510,8 @@ parse_error: restore_flags(flags); printk("proc_ide_write_settings(): parse error\n"); +#endif + return -EINVAL; } @@ -717,7 +720,9 @@ if (!root) return; create_proc_ide_interfaces(root); +#ifdef CONFIG_PCI ent = create_proc_entry("drivers", 0, root); if (!ent) return; ent->read_proc = proc_ide_read_drivers; +#endif } But msdosfs doensn't compile yet. In the mean time I found a patch at linux-kernel. Apart from this, 2.1.79 seems to work. > got a lot of fixes and updates from Andreas, Roman Zippel and Geert. And here are some frame buffer fixes: - add missing patches for cyberfb - add mach64fb (I don't do politics) - fixes for virgefb - some cosmetics :-) (yes, I compiled all frame buffer devices for m68k) --- m68k-2.1.79/drivers/char/fbmem.c.orig Tue Jan 13 19:11:39 1998 +++ m68k-2.1.79/drivers/char/fbmem.c Tue Jan 13 23:11:50 1998 @@ -100,8 +100,11 @@ #ifdef CONFIG_APOLLO { "apollo", dnfb_init, NULL }, #endif +#ifdef CONFIG_FB_MACH64 + { "mach64", mach64fb_init, mach64fb_setup }, +#endif #ifdef CONFIG_FB_S3TRIO - { "s3trio",s3triofb_init,s3trio_video_setup }, + { "s3trio",s3triofb_init,s3trio_video_setup }, #endif #ifdef CONFIG_FB_TGA { "tga", tgafb_init, NULL }, --- m68k-2.1.79/drivers/video/Config.in.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/Config.in Tue Jan 13 23:13:25 1998 @@ -19,13 +19,13 @@ fi tristate 'Amiga CyberVision support' CONFIG_FB_CYBER if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then -# bool 'Amiga CyberVision3D support (experimental)' CONFIG_FB_CV3D + bool 'Amiga CyberVision3D support (experimental)' CONFIG_FB_VIRGE tristate 'Amiga RetinaZ3 support' CONFIG_FB_RETINAZ3 fi fi if [ "$CONFIG_ATARI" = "y" ]; then bool 'Atari native chipset support' CONFIG_FB_ATARI -# tristate 'Mach64 Frame Buffer support' CONFIG_FB_MACH64 + tristate 'Mach64 Frame Buffer support' CONFIG_FB_MACH64 fi if [ "$CONFIG_CHRP" = "y" -o "$CONFIG_PMAC" = "y" ]; then bool 'Open Firmware frame buffer device support' CONFIG_FB_OPEN_FIRMWARE @@ -42,7 +42,7 @@ fi if [ "$CONFIG_MAC" = "y" ]; then define_bool CONFIG_FB_MAC y - fi + fi if [ "$CONFIG_TGA_CONSOLE" = "y" ]; then define_bool CONFIG_FB_TGA y fi @@ -66,7 +66,7 @@ else if [ "$CONFIG_FB_AMIGA" != "n" -o "$CONFIG_FB_ATARI" != "n" -o \ "$CONFIG_FB_CYBER" != "n" -o "$CONFIG_FB_RETINAZ3" != "n" -o \ - "$CONFIG_FB_CV3D" != "n" -o "$CONFIG_FB_MAC" != "n" -o \ + "$CONFIG_FB_VIRGE" != "n" -o "$CONFIG_FB_MAC" != "n" -o \ "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_VIRTUAL" = "m" ]; then define_bool CONFIG_FBCON_MFB y fi @@ -88,7 +88,7 @@ if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_ATARI" = "m" -o \ "$CONFIG_FB_OPEN_FIRMWARE" = "y" -o "$CONFIG_FB_MAC" = "y" -o \ "$CONFIG_FB_TGA" = "y" -o \ - "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_VIRTUAL" = "m" -o ]; then + "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_VIRTUAL" = "m" ]; then define_bool CONFIG_FBCON_CFB8 y fi if [ "$CONFIG_FB_ATARI" = "y" -o "$CONFIG_FB_ATARI" = "m" -o \ @@ -101,21 +101,6 @@ "$CONFIG_FB_VIRTUAL" = "y" -o "$CONFIG_FB_VIRTUAL" = "m" ]; then define_bool CONFIG_FBCON_CFB32 y fi - if [ "$CONFIG_FB_CYBER" = "y" -o "$CONFIG_FB_CYBER" = "m" ]; then - define_bool CONFIG_FBCON_CYBER y - fi - if [ "$CONFIG_FB_CV3D" = "y" ]; then - define_bool CONFIG_FBCON_VIRGE y - fi - if [ "$CONFIG_FB_RETINAZ3" = "y" -o "$CONFIG_FB_RETINAZ3" = "m" ]; then - define_bool CONFIG_FBCON_RETINAZ3 y - fi - if [ "$CONFIG_FB_ATY" = "y" ]; then - define_bool CONFIG_FBCON_ATY y - fi -# if [ "$CONFIG_FB_S3TRIO" = "y" -o "$CONFIG_FB_S3TRIO" = "m" ]; then -# define_bool CONFIG_FBCON_TRIO y -# fi fi endmenu --- m68k-2.1.79/drivers/video/cyberfb.c.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/cyberfb.c Tue Jan 13 23:38:31 1998 @@ -20,7 +20,9 @@ * for more details. */ +#define CYBERFBDEBUG +#include #include #include #include @@ -36,11 +38,27 @@ #include #include #include +#include + #include "s3blit.h" +#include "fbcon.h" +#include "fbcon-cfb8.h" +#include "fbcon-cfb16.h" + +#ifdef CYBERFBDEBUG +#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) +#else +#define DPRINTK(fmt, args...) +#endif #define arraysize(x) (sizeof(x)/sizeof(*(x))) + +#define wb_64(reg,dat) (*((unsigned char volatile *)CyberRegs + reg) = dat) + + + struct cyberfb_par { int xres; int yres; @@ -72,9 +90,9 @@ int (*decode_var)(struct fb_var_screeninfo *var, struct cyberfb_par *par); int (*encode_var)(struct fb_var_screeninfo *var, struct cyberfb_par *par); int (*getcolreg)(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp); + u_int *transp, struct fb_info *info); int (*setcolreg)(u_int regno, u_int red, u_int green, u_int blue, - u_int transp); + u_int transp, struct fb_info *info); void (*blank)(int blank); } *fbhw; @@ -106,7 +124,7 @@ static unsigned long CyberMem; static unsigned long CyberSize; static volatile char *CyberRegs; - + /* * Predefined Video Modes @@ -114,34 +132,55 @@ static struct fb_videomode cyberfb_predefined[] __initdata = { { - "cyber8", { /* Cybervision 8 bpp */ - CYBER8_WIDTH, CYBER8_HEIGHT, CYBER8_WIDTH, CYBER8_HEIGHT, 0, 0, 8, 0, + "640x480-8", { /* Cybervision 8 bpp */ + 640, 480, 640, 480, 0, 0, 8, 0, {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED } }, { - "cyber16", { /* Cybervision 16 bpp */ - 800, 600, 800, 600, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCEL_NONE, CYBER16_PIXCLOCK, 64, 96, 35, 12, 112, 2, + "800x600-8", { /* Cybervision 8 bpp */ + 800, 600, 800, 600, 0, 0, 8, 0, + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED } }, { - "800x600x8", { /* Cybervision 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, + "1024x768-8", { /* Cybervision 8 bpp */ + 1024, 768, 1024, 768, 0, 0, 8, 0, {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED } }, { - "640x480x8", { /* Cybervision 8 bpp */ - 640, 480, 640, 480, 0, 0, 8, 0, + "1152x886-8", { /* Cybervision 8 bpp */ + 1152, 886, 1152, 886, 0, 0, 8, 0, {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED } - }, + }, { + "1280x1024-8", { /* Cybervision 8 bpp */ + 1280, 1024, 1280, 1024, 0, 0, 8, 0, + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, + FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + } + }, { + "1600x1200-8", { /* Cybervision 8 bpp */ + 1600, 1200, 1600, 1200, 0, 0, 8, 0, + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, CYBER8_PIXCLOCK, 64, 96, 35, 12, 112, 2, + FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + } + }, { + "800x600-16", { /* Cybervision 16 bpp */ + 800, 600, 800, 600, 0, 0, 16, 0, + {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, CYBER16_PIXCLOCK, 64, 96, 35, 12, 112, 2, + FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + } + } }; @@ -154,13 +193,12 @@ static int Cyberfb_Cyber16 = 0; /* Use Cybervision board */ #endif - /* * Some default modes */ -#define CYBER8_DEFMODE (1) -#define CYBER16_DEFMODE (2) +#define CYBER8_DEFMODE (0) +#define CYBER16_DEFMODE (6) static struct fb_var_screeninfo cyberfb_default; @@ -171,19 +209,22 @@ void cyberfb_setup(char *options, int *ints); -static int cyberfb_open(int fbidx); -static int cyberfb_release(int fbidx); -static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, int fbidx); -static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, int fbidx); -static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, int fbidx); +static int cyberfb_open(struct fb_info *info); +static int cyberfb_release(struct fb_info *info); +static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, struct +fb_info *info); +static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, struct +fb_info *info); +static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, struct +fb_info *info); static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - int fbidx); + struct fb_info *info); static int cyberfb_set_cmap(struct fb_cmap *cmap, int kspc, int con, - int fbidx); + struct fb_info *info); static int cyberfb_pan_display(struct fb_var_screeninfo *var, int con, - int fbidx); + struct fb_info *info); static int cyberfb_ioctl(struct inode *inode, struct file *file, u_int cmd, - u_long arg, int con, int fbidx); + u_long arg, int con, struct fb_info *info); /* @@ -191,22 +232,30 @@ */ unsigned long cyberfb_init(unsigned long mem_start); -static int Cyberfb_switch(int con); -static int Cyberfb_updatevar(int con); -static void Cyberfb_blank(int blank); +static int Cyberfb_switch(int con, struct fb_info *info); +static int Cyberfb_updatevar(int con, struct fb_info *info); +static void Cyberfb_blank(int blank, struct fb_info *info); + + +/* + * Text console acceleration + */ + +static struct display_switch fbcon_cyber8; /* * Accelerated Functions used by the low level console driver */ -void Cyber_WaitQueue(u_short fifo); -void Cyber_WaitBlit(void); -void Cyber_BitBLT(u_short curx, u_short cury, u_short destx, u_short desty, - u_short width, u_short height, u_short mode); -void Cyber_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short mode, u_short color); -void Cyber_MoveCursor(u_short x, u_short y); +static void Cyber_WaitQueue(u_short fifo); +static void Cyber_WaitBlit(void); +static void Cyber_BitBLT(u_short curx, u_short cury, u_short destx, + u_short desty, u_short width, u_short height, + u_short mode); +static void Cyber_RectFill(u_short x, u_short y, u_short width, u_short height, + u_short mode, u_short color); +static void Cyber_MoveCursor(u_short x, u_short y); /* @@ -221,9 +270,9 @@ static int Cyber_encode_var(struct fb_var_screeninfo *var, struct cyberfb_par *par); static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp); + u_int *transp, struct fb_info *info); static int Cyber_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp); + u_int transp, struct fb_info *info); static void Cyber_blank(int blank); @@ -234,8 +283,8 @@ static void cyberfb_get_par(struct cyberfb_par *par); static void cyberfb_set_par(struct cyberfb_par *par); static int do_fb_set_var(struct fb_var_screeninfo *var, int isactive); -static void do_install_cmap(int con); -static void cyberfb_set_disp(int con); +static void do_install_cmap(int con, struct fb_info *info); +static void cyberfb_set_disp(int con, struct fb_info *info); static int get_video_mode(const char *name); @@ -256,30 +305,31 @@ volatile u_long *CursorBase; for (i = 0; i < 256; i++) - - for (i = 0; i < 256; i++) - { - Cyber_colour_table [i][0] = i; - Cyber_colour_table [i][1] = i; - Cyber_colour_table [i][2] = i; - Cyber_colour_table [i][3] = 0; - } + { + Cyber_colour_table [i][0] = i; + Cyber_colour_table [i][1] = i; + Cyber_colour_table [i][2] = i; + Cyber_colour_table [i][3] = 0; + } /* * Just clear the thing for the biggest mode. + * + * ++Andre, TODO: determine size first, then clear all memory + * (the 3D penguin might need texture memory :-) ) */ - memset ((char*)CyberMem, 0, CYBER8_WIDTH * CYBER8_HEIGHT); + memset ((char*)CyberMem, 0, 1600 * 1200); /* Disable hardware cursor */ - *(CyberRegs + S3_CRTC_ADR) = S3_REG_LOCK2; - *(CyberRegs + S3_CRTC_DATA) = 0xa0; - *(CyberRegs + S3_CRTC_ADR) = S3_HGC_MODE; - *(CyberRegs + S3_CRTC_DATA) = 0x00; - *(CyberRegs + S3_CRTC_ADR) = S3_HWGC_DX; - *(CyberRegs + S3_CRTC_DATA) = 0x00; - *(CyberRegs + S3_CRTC_ADR) = S3_HWGC_DY; - *(CyberRegs + S3_CRTC_DATA) = 0x00; + wb_64(S3_CRTC_ADR, S3_REG_LOCK2); + wb_64(S3_CRTC_DATA, 0xa0); + wb_64(S3_CRTC_ADR, S3_HGC_MODE); + wb_64(S3_CRTC_DATA, 0x00); + wb_64(S3_CRTC_ADR, S3_HWGC_DX); + wb_64(S3_CRTC_DATA, 0x00); + wb_64(S3_CRTC_ADR, S3_HWGC_DY); + wb_64(S3_CRTC_DATA, 0x00); /* Get memory size (if not 2MB it is 4MB) */ *(CyberRegs + S3_CRTC_ADR) = S3_LAW_CTL; @@ -306,8 +356,8 @@ *(CursorBase+3+(i*4)) = 0xffff0000; } - Cyber_setcolreg (255, 56, 100, 160, 0); - Cyber_setcolreg (254, 0, 0, 0, 0); + Cyber_setcolreg (255, 56, 100, 160, 0, NULL /* unused */); + Cyber_setcolreg (254, 0, 0, 0, 0, NULL /* unused */); return 0; } @@ -420,7 +470,10 @@ var->height = -1; var->width = -1; + var->accel = FB_ACCEL_CYBERVISION; + DPRINTK("accel CV64\n"); + var->vmode = FB_VMODE_NONINTERLACED; /* Dummy values */ @@ -451,20 +504,22 @@ */ static int Cyber_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp) + u_int transp, struct fb_info *info) { if (regno > 255) + { return (1); + } - *(CyberRegs + 0x3c8) = (char)regno; + wb_64(0x3c8, (unsigned char) regno); Cyber_colour_table [regno][0] = red & 0xff; Cyber_colour_table [regno][1] = green & 0xff; Cyber_colour_table [regno][2] = blue & 0xff; Cyber_colour_table [regno][3] = transp; - *(CyberRegs + 0x3c9) = (red & 0xff) >> 2; - *(CyberRegs + 0x3c9) = (green & 0xff) >> 2; - *(CyberRegs + 0x3c9) = (blue & 0xff) >> 2; + wb_64(0x3c9, (red & 0xff) >> 2); + wb_64(0x3c9, (green & 0xff) >> 2); + wb_64(0x3c9, (blue & 0xff) >> 2); return (0); } @@ -476,13 +531,13 @@ */ static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp) + u_int *transp, struct fb_info *info) { if (regno >= 256) return (1); - *red = Cyber_colour_table [regno][0]; - *green = Cyber_colour_table [regno][1]; - *blue = Cyber_colour_table [regno][2]; + *red = Cyber_colour_table [regno][0]; + *green = Cyber_colour_table [regno][1]; + *blue = Cyber_colour_table [regno][2]; *transp = Cyber_colour_table [regno][3]; return (0); } @@ -497,28 +552,32 @@ int i; if (blank) + { for (i = 0; i < 256; i++) { - *(CyberRegs + 0x3c8) = i; - *(CyberRegs + 0x3c9) = 0; - *(CyberRegs + 0x3c9) = 0; - *(CyberRegs + 0x3c9) = 0; + wb_64(0x3c8, (unsigned char) i); + wb_64(0x3c9, 0); + wb_64(0x3c9, 0); + wb_64(0x3c9, 0); } + } else + { for (i = 0; i < 256; i++) { - *(CyberRegs + 0x3c8) = i; - *(CyberRegs + 0x3c9) = Cyber_colour_table [i][0] >> 2; - *(CyberRegs + 0x3c9) = Cyber_colour_table [i][1] >> 2; - *(CyberRegs + 0x3c9) = Cyber_colour_table [i][2] >> 2; + wb_64(0x3c8, (unsigned char) i); + wb_64(0x3c9, Cyber_colour_table[i][0] >> 2); + wb_64(0x3c9, Cyber_colour_table[i][1] >> 2); + wb_64(0x3c9, Cyber_colour_table[i][2] >> 2); } + } } /************************************************************** * We are waiting for "fifo" FIFO-slots empty */ -void Cyber_WaitQueue (u_short fifo) +static void Cyber_WaitQueue (u_short fifo) { u_short status; @@ -532,7 +591,7 @@ /************************************************************** * We are waiting for Hardware (Graphics Engine) not busy */ -void Cyber_WaitBlit (void) +static void Cyber_WaitBlit (void) { u_short status; @@ -546,8 +605,9 @@ /************************************************************** * BitBLT - Through the Plane */ -void Cyber_BitBLT (u_short curx, u_short cury, u_short destx, u_short desty, - u_short width, u_short height, u_short mode) +static void Cyber_BitBLT (u_short curx, u_short cury, u_short destx, + u_short desty, u_short width, u_short height, + u_short mode) { u_short blitcmd = S3_BITBLT; @@ -589,8 +649,8 @@ /************************************************************** * Rectangle Fill Solid */ -void Cyber_RectFill (u_short x, u_short y, u_short width, u_short height, - u_short mode, u_short color) +static void Cyber_RectFill (u_short x, u_short y, u_short width, + u_short height, u_short mode, u_short color) { u_short blitcmd = S3_FILLEDRECT; @@ -611,11 +671,10 @@ *((u_short volatile *)(CyberRegs + S3_CMD)) = blitcmd; } - /************************************************************** * Move cursor to x, y */ -void Cyber_MoveCursor (u_short x, u_short y) +static void Cyber_MoveCursor (u_short x, u_short y) { *(CyberRegs + S3_CRTC_ADR) = 0x39; *(CyberRegs + S3_CRTC_DATA) = 0xa0; @@ -651,9 +710,13 @@ static void cyberfb_get_par(struct cyberfb_par *par) { if (current_par_valid) + { *par = current_par; + } else + { fbhw->decode_var(&cyberfb_default, par); + } } @@ -667,6 +730,7 @@ static void cyber_set_video(struct fb_var_screeninfo *var) { /* Set clipping rectangle to current screen size */ + *((u_short volatile *)(CyberRegs + 0xbee8)) = 0x1000; *((u_short volatile *)(CyberRegs + 0xbee8)) = 0x2000; @@ -693,16 +757,16 @@ } -static void do_install_cmap(int con) +static void do_install_cmap(int con, struct fb_info *info) { if (con != currcon) return; if (fb_display[con].cmap.len) fb_set_cmap(&fb_display[con].cmap, &fb_display[con].var, 1, - fbhw->setcolreg); + fbhw->setcolreg, info); else - fb_set_cmap(fb_default_cmap(fb_display[con].var.bits_per_pixel), - &fb_display[con].var, 1, fbhw->setcolreg); + fb_set_cmap(fb_default_cmap(1<setcolreg, info); } @@ -710,7 +774,7 @@ * Open/Release the frame buffer device */ -static int cyberfb_open(int fbidx) +static int cyberfb_open(struct fb_info *info) { /* * Nothing, only a usage count for the moment @@ -720,7 +784,7 @@ return(0); } -static int cyberfb_release(int fbidx) +static int cyberfb_release(struct fb_info *info) { MOD_DEC_USE_COUNT; return(0); @@ -731,7 +795,8 @@ * Get the Fixed Part of the Display */ -static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, int fbidx) +static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, + struct fb_info *info) { struct cyberfb_par par; int error = 0; @@ -748,21 +813,28 @@ * Get the User Defined Part of the Display */ -static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, int fbidx) +static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, + struct fb_info *info) { struct cyberfb_par par; int error = 0; - if (con == -1) { + if (con == -1) + { cyberfb_get_par(&par); error = fbhw->encode_var(var, &par); - } else + disp.var = *var; /* ++Andre: don't know if this is the right place */ + } + else + { *var = fb_display[con].var; + } + return(error); } -static void cyberfb_set_disp(int con) +static void cyberfb_set_disp(int con, struct fb_info *info) { struct fb_fix_screeninfo fix; struct display *display; @@ -772,8 +844,7 @@ else display = &disp; /* used during initialization */ - /* ### FN: Needs fixes later */ - cyberfb_get_fix(&fix, con, 0); + cyberfb_get_fix(&fix, con, info); if (con == -1) con = 0; display->screen_base = (u_char *)fix.smem_start; @@ -784,6 +855,17 @@ display->ywrapstep = fix.ywrapstep; display->can_soft_blank = 1; display->inverse = Cyberfb_inverse; + switch (display->var.bits_per_pixel) { + case 8: + display->dispsw = &fbcon_cyber8; + break; + case 16: + display->dispsw = &fbcon_cfb16; + break; + default: + display->dispsw = NULL; + break; + } } @@ -791,7 +873,8 @@ * Set the User Defined Part of the Display */ -static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, int fbidx) +static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, + struct fb_info *info) { int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp; @@ -808,10 +891,10 @@ oldvxres != var->xres_virtual || oldvyres != var->yres_virtual || oldbpp != var->bits_per_pixel) { - cyberfb_set_disp(con); + cyberfb_set_disp(con, info); (*fb_info.changevar)(con); fb_alloc_cmap(&fb_display[con].cmap, 0, 0); - do_install_cmap(con); + do_install_cmap(con, info); } } var->activate = 0; @@ -824,15 +907,15 @@ */ static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - int fbidx) + struct fb_info *info) { if (con == currcon) /* current console? */ return(fb_get_cmap(cmap, &fb_display[con].var, - kspc, fbhw->getcolreg)); + kspc, fbhw->getcolreg, info)); else if (fb_display[con].cmap.len) /* non default colormap? */ fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); else - fb_copy_cmap(fb_default_cmap(fb_display[con].var.bits_per_pixel), + fb_copy_cmap(fb_default_cmap(1<setcolreg)); + kspc, fbhw->setcolreg, info)); else fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1); return(0); @@ -867,18 +950,19 @@ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag */ -static int cyberfb_pan_display(struct fb_var_screeninfo *var, int con, int fbidx) +static int cyberfb_pan_display(struct fb_var_screeninfo *var, int con, + struct fb_info *info) { return(-EINVAL); } /* - * Cybervision Frame Buffer Specific ioctls + * Cybervision Frame Buffer Specific ioctls */ static int cyberfb_ioctl(struct inode *inode, struct file *file, - u_int cmd, u_long arg, int con, int fbidx) + u_int cmd, u_long arg, int con, struct fb_info *info) { return(-EINVAL); } @@ -906,8 +990,18 @@ fb_invert_cmaps(); } else if (!strncmp(this_opt, "font:", 5)) strcpy(fb_info.fontname, this_opt+5); + else if (!strcmp (this_opt, "cyber8")){ + cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; + } + else if (!strcmp (this_opt, "cyber16")){ + cyberfb_default = cyberfb_predefined[CYBER16_DEFMODE].var; + } else get_video_mode(this_opt); + + DPRINTK("default mode: xres=%d, yres=%d, bpp=%d\n",cyberfb_default.xres, + cyberfb_default.yres, + cyberfb_default.bits_per_pixel); } @@ -954,9 +1048,9 @@ fbhw->encode_var(&cyberfb_default, &par); do_fb_set_var(&cyberfb_default, 1); - cyberfb_get_var(&fb_display[0].var, -1, GET_FB_IDX(fb_info.node)); - cyberfb_set_disp(-1); - do_install_cmap(0); + cyberfb_get_var(&fb_display[0].var, -1, &fb_info); + cyberfb_set_disp(-1, &fb_info); + do_install_cmap(0, &fb_info); printk("%s frame buffer device, using %ldK of video memory\n", fb_info.modename, CyberSize>>10); @@ -968,17 +1062,17 @@ } -static int Cyberfb_switch(int con) +static int Cyberfb_switch(int con, struct fb_info *info) { /* Do we have to save the colormap? */ if (fb_display[currcon].cmap.len) fb_get_cmap(&fb_display[currcon].cmap, &fb_display[currcon].var, 1, - fbhw->getcolreg); + fbhw->getcolreg, info); do_fb_set_var(&fb_display[con].var, 1); currcon = con; /* Install new colormap */ - do_install_cmap(con); + do_install_cmap(con, info); return(0); } @@ -990,7 +1084,7 @@ * Since it's called by a kernel driver, no range checking is done. */ -static int Cyberfb_updatevar(int con) +static int Cyberfb_updatevar(int con, struct fb_info *info) { return(0); } @@ -1000,7 +1094,7 @@ * Blank the display. */ -static void Cyberfb_blank(int blank) +static void Cyberfb_blank(int blank, struct fb_info *info) { fbhw->blank(blank); } @@ -1014,14 +1108,73 @@ { int i; - for (i = 0; i < NUM_TOTAL_MODES; i++) - if (!strcmp(name, cyberfb_predefined[i].name)) + for (i = 0; i < NUM_TOTAL_MODES; i++) { + if (!strcmp(name, cyberfb_predefined[i].name)) { cyberfb_default = cyberfb_predefined[i].var; return(i); + } + } + /* ++Andre: set cyberfb default mode */ + cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; return(0); } +/* + * Text console acceleration + */ + +static void fbcon_cyber8_bmove(struct display *p, int sy, int sx, int dy, + int dx, int height, int width) +{ + sx *= 8; dx *= 8; width *= 8; + Cyber_BitBLT((u_short)sx, (u_short)(sy*p->fontheight), (u_short)dx, + (u_short)(dy*p->fontheight), (u_short)width, + (u_short)(height*p->fontheight), (u_short)S3_NEW); +} + +static void fbcon_cyber8_clear(struct vc_data *conp, struct display *p, int sy, + int sx, int height, int width) +{ + unsigned char bg; + + sx *= 8; width *= 8; + bg = attr_bgcol_ec(p,conp); + Cyber_RectFill((u_short)sx, + (u_short)(sy*p->fontheight), + (u_short)width, + (u_short)(height*p->fontheight), + (u_short)S3_NEW, + (u_short)bg); +} + +static void fbcon_cyber8_putc(struct vc_data *conp, struct display *p, int c, + int yy, int xx) +{ + Cyber_WaitBlit(); + fbcon_cfb8_putc(conp, p, c, yy, xx); +} + +static void fbcon_cyber8_putcs(struct vc_data *conp, struct display *p, + const char *s, int count, int yy, int xx) +{ + Cyber_WaitBlit(); + fbcon_cfb8_putcs(conp, p, s, count, yy, xx); +} + +static void fbcon_cyber8_revc(struct display *p, int xx, int yy) +{ + Cyber_WaitBlit(); + fbcon_cfb8_revc(p, xx, yy); +} + +static struct display_switch fbcon_cyber8 = { + fbcon_cfb8_setup, fbcon_cyber8_bmove, fbcon_cyber8_clear, fbcon_cyber8_putc, + fbcon_cyber8_putcs, fbcon_cyber8_revc +}; + + + #ifdef MODULE int init_module(void) { @@ -1036,12 +1189,3 @@ /* TODO: clean up ... */ } #endif /* MODULE */ - - -/* - * Visible symbols for modules - */ - -EXPORT_SYMBOL(Cyber_BitBLT); -EXPORT_SYMBOL(Cyber_RectFill); -EXPORT_SYMBOL(Cyber_WaitBlit); --- m68k-2.1.79/drivers/video/mach64fb.c.orig Tue Jan 13 23:15:02 1998 +++ m68k-2.1.79/drivers/video/mach64fb.c Tue Jan 13 23:41:11 1998 @@ -0,0 +1,2644 @@ +/* + * linux/drivers/video/mach64fb.c -- Low level implementation of the + * ATI Mach64 frame buffer device + * + * Copyright (C) 1997 Bernd Harries + * + * + * This file is based on the Atari frame buffer device (atafb.c): + * + * Copyright (C) 1994 Martin Schaller & Roman Hodek + * + * + * and the Amiga frame buffer device (amifb.c): + * + * Copyright (C) 1995 Geert Uytterhoeven + * + * + * History: + * - 09 Aug 97: Original version by Bernd Harries + * - 27 Aug 97: Extra Parameter for GUIreg-Base for Panther 64 + * - 03 Oct 97: Minor changes by Bernd Harries + * + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/*============================================================================*/ +/* Includes */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mach64regs.h" +#include "fbcon.h" +#include "fbcon-cfb8.h" +#include "fbcon-cfb16.h" + + +unsigned long mach64fb_init(unsigned long mem_start); +void mach64fb_setup(char *options, int *ints); + +/*============================================================================*/ +/* Defines */ + +#define _NOT_MAP_768K_IO_ + +#define _MAP_GUIREGS_0BFC00_ + + +#define _NOT_DUMP_IO_REGS_ + +#define _NOT_DUMP_GUIREGS_0BFC00_ + +#define _NOT_DUMP_GUIREGS_3FFC00_ + +#define _NOT_DUMP_KMAP_RANGE_ + + +#ifdef MULTI_MACH + +#define MACH_MAX 8 + +#define DECLARE_STATIC_UINT08___MN_ static unsigned char m64_num; +#define DECLARE_UINT08___MN_ unsigned char m64_num; +#define ARG_UINT08___MN_ unsigned char m64_num +#define ADD_ARG_UINT08___MN_ , unsigned char m64_num + +#define _ARRAY_ [MACH_MAX] +#define __MN__ [m64_num] +#define _MN_ m64_num +#define _INC_MN_ m64_num++ +#define _ARG_MN_ m64_num +#define _ADD_ARG_MN_ , m64_num + +#else /*---------------------*/ + +#define DECLARE_STATIC_UINT08___MN_ +#define DECLARE_UINT08___MN_ +#define ARG_UINT08___MN_ void +#define ADD_ARG_UINT08___MN_ + +#define _ARRAY_ +#define __MN__ +#define _MN_ 0 +#define _INC_MN_ +#define _ARG_MN_ +#define _ADD_ARG_MN_ + +#endif /* MULTI_MACH */ + +/*--------------------------------------------------------------------------*/ + +#define MACH_MAX 8 +#define arraysize(x) (sizeof(x)/sizeof(*(x))) + +#define FuncId if(mach64fb_debug & 0x00000100) printk +#define FuncDone if(mach64fb_debug & 0x00000200) printk +#define CFuncId if(mach64fb_debug & 0x00000400) printk +#define CFuncDone if(mach64fb_debug & 0x00000800) printk +#define OFuncId if(mach64fb_debug & 0x00001000) printk +#define OFuncDone if(mach64fb_debug & 0x00002000) printk + + +/* Busy */ +#define Bprint if(mach64fb_debug & 0x01000000) printk +/* Debug */ +#define Dprint if(mach64fb_debug & 0x00800000) printk + +/* Message */ +#define Mprint if(mach64fb_debug & 0x00004000) printk +/* Info */ +#define Iprint if(mach64fb_debug & 0x00008000) printk +/* Warn */ +#define Wprint if(mach64fb_debug & 0x00010000) printk +/* Error */ +#define Eprint if(mach64fb_debug & 0x00020000) printk +/* Fatal */ +#define Fprint if(mach64fb_debug & 0x00040000) printk +/* Panic */ +#define Pprint if(mach64fb_debug & 0x00080000) printk + +/*--------------------------------------------------------------------------*/ + +#define _USE_HW_ACCEL_BLT_ +#define _USE_HW_ACCEL_FILL_ + +/*--------------------------------------------------------------------------*/ + +/* + * This Fragment is for learning and for future expansion so far: + * + * Byte swaping is probably not needed on Alpha CPUs but The IO is memory + * mapped anyway and writing data < 32 bit is impossible on the actual + * CPUs unless the board has a sparse space. + * + * The DEC Alpha CPUs have write buffers that hold data to be written + * to memory. The data is NOT necessarily written to memory immediately + * after the instruction. + * Darum: The machine instruction MB (memory barrier, wbflush on Mips CPUs) + * has to be executed to force the flush of these buffers, or a write + * instruction at least $1000 bytes apart from the access to be flushed + * (may be more in future CPUs) has to follow. This can be done by using + * mirrored registers if available. The Mach64 GUI registers are all within + * 1 $1000 byte area and are not always mirrored. => MB instruction. + * + */ + +#ifdef __alpha__ + +#define barrier() __asm__ __volatile__("mb": : :"memory") + +#else /* __alpha__ */ + +#ifdef __mips + +#define barrier() __asm__ __volatile__ ("wbflush": : :"memory") + +#else +/* +#define barrier() / * Serialized Nocaching => Not used on 680x0 today * / +*/ +#endif /* __mips__ */ +#endif /* __alpha__ */ + +/*--------------------------------------------------------------------------*/ + +#ifdef _MAP_768K_IO_ + +#define OUTB(port,val) \ + *((unsigned volatile char *) ((port) + 0x00080000 + virt_vgaiobase __MN__ )) = (val) + +#define INB(port) \ + (*((unsigned volatile char *) ((port) + 0x00080000 + virt_vgaiobase __MN__ ))) + +/* +#define OUTL(port,val) \ + *((unsigned volatile int *) ((port) + 0x00080000 + virt_vgaiobase __MN__ )) = (val) + +#define INL(port) \ + (*((unsigned volatile int *) ((port) + 0x00080000 + virt_vgaiobase __MN__ ))) +*/ + +#else + +#define OUTB(port,val) \ + *((unsigned volatile char *) ((port) + virt_vgaiobase __MN__ )) = (val) + +#define INB(port) \ + (*((unsigned volatile char *) ((port) + virt_vgaiobase __MN__ ))) + +/* +#define OUTL(port,val) \ + *((unsigned volatile int *) ((port) + virt_vgaiobase __MN__ )) = (val) + +#define INL(port) \ + (*((unsigned volatile int *) ((port) + virt_vgaiobase __MN__ ))) +*/ + +#endif /* _MAP_768K_IO_ */ + +#define DACDelay \ + do { \ + unsigned char tmp = INB(0x3da); \ + tmp = INB(0x3da); \ + } while (0) + +/*============================================================================*/ + +/* +#define regwr(port, val) \ + *((unsigned volatile int *) ((port) + virt_vgaiobase __MN__ )) = (val) + + +#define regrd(port) \ + (*((unsigned volatile int *) ((port) + virt_vgaiobase __MN__ ))) +*/ + +/*============================================================================*/ +/* Types */ + +struct mach64fb_par +{ + int xres; + int yres; + int bpp; +}; + +/*============================================================================*/ +/* Extern Functions*/ + + + +/*============================================================================*/ +/* Intern Functions*/ + +/*--------------------------------------------------------------------------*/ + /* + * Interface to the low level console driver exported with fb_info + */ + +static int Mach64fb_switch(int con, struct fb_info *info); +static int Mach64fb_updatevar(int con, struct fb_info *info); +static void Mach64fb_blank(int blank, struct fb_info *info); + +/*--------------------------------------------------------------------------*/ + /* + * Interface fb_ops used by the world exported with fb_info.fb_ops + */ + +static int M64_op_open(struct fb_info *info); +static int M64_op_release(struct fb_info *info); +static int M64_op_get_fix(struct fb_fix_screeninfo * fix, int con, + struct fb_info *info); +static int M64_op_get_var(struct fb_var_screeninfo * var, int con, + struct fb_info *info); +static int M64_op_set_var(struct fb_var_screeninfo * var, int con, + struct fb_info *info); +static int M64_op_get_cmap(struct fb_cmap * cmap, int kspc, int con, + struct fb_info *info); +static int M64_op_set_cmap(struct fb_cmap * cmap, int kspc, int con, + struct fb_info *info); +static int M64_op_pan_display(struct fb_var_screeninfo * var, int con, + struct fb_info *info); + +static int +M64_op_ioctl( + struct inode * inode, + struct file *file, + u_int cmd, + u_long arg, + int con, + struct fb_info *info); + + + /* + * Text console acceleration + */ + +static struct display_switch fbcon_mach64_8; + +/*--------------------------------------------------------------------------*/ + /* + * Internal Routines + */ + +static int +do_fb_set_var(struct fb_var_screeninfo * var, int isactive); + +static void +do_install_cmap(int con, struct fb_info *info); + +static void +mach64fb_set_disp(int con, struct fb_info *info); + +static int +get_video_mode(const char * name); + +static int +store_video_par(char* videopar ADD_ARG_UINT08___MN_ ); + +static char * +strtoke(char * s,const char * ct); + +/*--------------------------------------------------------------------------*/ + /* + * Hardware Specific Routines + */ + +static int +M64_hw_init( ARG_UINT08___MN_ ); + +static int +M64_hw_encode_fix(struct fb_fix_screeninfo * fix, struct mach64fb_par * par); + +static int +M64_hw_decode_var(struct fb_var_screeninfo * var, struct mach64fb_par * par); + +static int +M64_hw_encode_var(struct fb_var_screeninfo * var, struct mach64fb_par * par); + +static void +M64_hw_get_par(struct mach64fb_par * par); + +static void +M64_hw_set_par(struct mach64fb_par * par); + +static int +M64_hw_getcolreg( + u_int regno, + u_int * red, + u_int * green, + u_int * blue, + u_int * transp, + struct fb_info *info); + +static int +M64_hw_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, + struct fb_info *info); + +static void +M64_hw_blank(int blank); + + + +/*============================================================================*/ +/*============================================================================*/ +/* Intern Variables */ + +/*--------------------------------------------------------------------------*/ +/* BSS */ + + +static unsigned long phys_vmembase _ARRAY_ ; +static unsigned long phys_size _ARRAY_ ; +static unsigned long phys_vgaiobase _ARRAY_ ; +static unsigned long phys_guiregbase _ARRAY_ ; + +static unsigned long virt_vmembase _ARRAY_ ; +static unsigned long virt_size _ARRAY_ ; +static unsigned long virt_vgaiobase _ARRAY_ ; +static unsigned long virt_guiregbase _ARRAY_ ; + +static unsigned int mach64_xres _ARRAY_ ; +static unsigned int mach64_yres _ARRAY_ ; +static unsigned int mach64_depth _ARRAY_ ; + + +static struct mach64fb_par current_par _ARRAY_ ; +static struct display m_disp _ARRAY_ ; +static struct fb_info fb_info _ARRAY_ ; + +static u_short mach64_colormap _ARRAY_ [256][4]; + +static u_int mach64_key; +static u_int mach64_bitspercol _ARRAY_ ; + +static int currcon; + + +static u_short mach64_inverse _ARRAY_ ; +static short int mach64_pmode _ARRAY_ ; +static short int mach64_mode _ARRAY_ ; /* 0..31 */ +static short int mach64_use_accel _ARRAY_ ; +static char current_par_valid _ARRAY_ ; + +static unsigned char mach64_count; + + +/*--------------------------------------------------------------------------*/ + /* + * Switch for Chipset Independency + */ + +static struct fb_hwswitch +{ + + /* Initialisation */ + + int (*init)( ARG_UINT08___MN_ ); + + /* Display Control */ + + int (*encode_fix)(struct fb_fix_screeninfo * fix, struct mach64fb_par * par); + int (*decode_var)(struct fb_var_screeninfo * var, struct mach64fb_par * par); + int (*encode_var)(struct fb_var_screeninfo * var, struct mach64fb_par * par); + void (*get_par)(struct mach64fb_par * par ); + void (*set_par)(struct mach64fb_par * par ); + int (*getcolreg)(u_int regno, u_int * red, u_int * green, u_int * blue, + u_int * transp, struct fb_info *info); + int (*setcolreg)(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info); + void (*blank)(int blank); + void (*set_screen_base)( unsigned long s_base ); + int (*pan_display)( struct fb_var_screeninfo * var); +} +* fbhws_ptr; + + +/*--------------------------------------------------------------------------*/ +/* Data */ + + +/* -------------- local Interfaces to hardware functions ---------------- */ + +/* see XGCValues GCFunction */ +int +mach64alu[16] = +{ + MIX_0, + MIX_AND, + MIX_SRC_AND_NOT_DST, + MIX_SRC, + MIX_NOT_SRC_AND_DST, + MIX_DST, + MIX_XOR, + MIX_OR, + MIX_NOR, + MIX_XNOR, + MIX_NOT_DST, + MIX_SRC_OR_NOT_DST, + MIX_NOT_SRC, + MIX_NOT_SRC_OR_DST, + MIX_NAND, + MIX_1 +}; + +static struct fb_hwswitch +mach64_switch = +{ + M64_hw_init, + M64_hw_encode_fix, + M64_hw_decode_var, + M64_hw_encode_var, + NULL, /* M64_hw_get_par, */ + NULL, /* M64_hw_set_par, */ + M64_hw_getcolreg, + M64_hw_setcolreg, + M64_hw_blank, + NULL, + NULL +}; + +/* ------ Interfaces to hardware functions to export with fb_info ------ */ + +static struct fb_ops +mach64fb_ops = +{ + M64_op_open, + M64_op_release, + M64_op_get_fix, + M64_op_get_var, + M64_op_set_var, + M64_op_get_cmap, + M64_op_set_cmap, + M64_op_pan_display, + M64_op_ioctl +}; + +static unsigned int mach64fb_debug = 0x018FCF00; + + /* + * Frame Buffer Name + */ + +static char mach64fb_name[16] = "ATI Mach64 "; + + + /* + * Ati Mach64 Graphics Board + */ + +#define M64_8_WIDTH 1152 +#define M64_8_HEIGHT 912 +#define M64_8_PIXCLOCK 12500 /* ++Geert: Just a guess */ + +#define M64_16_WIDTH 800 +#define M64_16_HEIGHT 600 +#define M64_16_PIXCLOCK 25000 /* ++Geert: Just a guess */ + + +/*--------------------------------------------------------------------------*/ + /* + * Predefined Video Mode Names + */ +/*--------------------------------------------------------------------------*/ + +static char * fb_var_names[] = +{ + + /* + * Autodetect (Default) Video Mode + */ + + "autodetect", + + /* + * Predefined Video Modes + */ + + "Mach64_8", /* Mach64 8 bpp */ + "Mach64_16", /* Mach64 16 bpp */ +}; + + +/*--------------------------------------------------------------------------*/ + /* + * Predefined Video Mode Definitions + */ +/*--------------------------------------------------------------------------*/ + +static struct fb_var_screeninfo mach64fb_predefined[] = +{ + + /* + * Autodetect (Default) Video Mode + */ + + { 0, }, + + /* + * Predefined Video Modes + */ + + { + /* Cybervision 8 bpp */ + M64_8_WIDTH, M64_8_HEIGHT, M64_8_WIDTH, M64_8_HEIGHT, 0, 0, 8, 0, + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, M64_8_PIXCLOCK, 64, 96, 35, 12, 112, 2, + FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, { + /* Cybervision 16 bpp */ + M64_16_WIDTH, M64_16_HEIGHT, M64_16_WIDTH, M64_16_HEIGHT, 0, 0, 16, 0, + {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, + 0, 0, -1, -1, FB_ACCEL_NONE, M64_16_PIXCLOCK, 64, 96, 35, 12, 112, 2, + FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED + }, +}; + + +#define NUM_TOTAL_MODES arraysize(mach64fb_predefined) +#define NUM_PREDEF_MODES (3) + + + /* + * Some default modes + */ + +#define M64_8_DEFMODE (1) +#define M64_16_DEFMODE (2) + + + +/*============================================================================*/ +/*============================================================================*/ +/* Functions */ + +/*============================================================================*/ +/*============================================================================*/ + + +/*============================================================================*/ + +__inline__ void +regwr(unsigned int regindex, unsigned long regdata) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x003FFC00 + virt_vmembase __MN__ ); + + lword = (regdata >> 16) | (regdata << 16); + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + *((unsigned volatile int*)(appaddr)) = lword; + barrier(); +} +/*============================================================================*/ + +__inline__ unsigned int +regrd(unsigned int regindex) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x003FFC00 + virt_vmembase __MN__ ); + + lword = (*((unsigned volatile int*)(appaddr))); + + lword = (lword >> 16) | (lword << 16); /* swap words */ + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + return(lword); +} +/*============================================================================*/ + +__inline__ void +regwrb(unsigned int regindex, unsigned char regdata) +{ + register unsigned long appaddr; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x003FFC00 + virt_vmembase __MN__ ); + + *(char *)appaddr = regdata; + barrier(); +} +/*============================================================================*/ + + +#ifdef _MAP_768K_IO_ + +__inline__ void +OUTL(unsigned int port, unsigned long regdata) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((port) + 0x00080000 + virt_vgaiobase __MN__ ); + + lword = (regdata >> 16) | (regdata << 16); + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + *((unsigned volatile int*)(appaddr)) = lword; + barrier(); +} +/*============================================================================*/ + +__inline__ unsigned int +INL(unsigned int port) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((port) + 0x00080000 + virt_vgaiobase __MN__ ); + + lword = (*((unsigned volatile int*)(appaddr))); + + lword = (lword >> 16) | (lword << 16); /* swap words */ + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + return(lword); +} +/*============================================================================*/ + +__inline__ void +regw(unsigned int regindex, unsigned long regdata) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0003FC00 + virt_vgaiobase __MN__ ); + + lword = (regdata >> 16) | (regdata << 16); + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + *((unsigned volatile int*)(appaddr)) = lword; + barrier(); +} +/*============================================================================*/ + +__inline__ unsigned int +regr(unsigned int regindex) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0003FC00 + virt_vgaiobase __MN__ ); + + lword = (*((unsigned volatile int*)(appaddr))); + + lword = (lword >> 16) | (lword << 16); /* swap words */ + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + return(lword); +} +/*============================================================================*/ + +__inline__ void +regwB(unsigned int regindex, unsigned char regdata) +{ + register unsigned long appaddr; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0003FC00 + virt_vgaiobase __MN__ ); + + *(char *)appaddr = regdata; + barrier(); +} +/*============================================================================*/ + +#else + +__inline__ void +OUTL(unsigned int port, unsigned long regdata) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((port) + virt_vgaiobase __MN__ ); + + lword = (regdata >> 16) | (regdata << 16); + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + *((unsigned volatile int*)(appaddr)) = lword; + barrier(); +} +/*============================================================================*/ + +__inline__ unsigned int +INL(unsigned int port) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((port) + virt_vgaiobase __MN__ ); + + lword = (*((unsigned volatile int*)(appaddr))); + + lword = (lword >> 16) | (lword << 16); /* swap words */ + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + return(lword); +} +/*============================================================================*/ + + + +__inline__ void +regw(unsigned int regindex, unsigned long regdata) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0000FC00 + virt_guiregbase __MN__ ); + + lword = (regdata >> 16) | (regdata << 16); + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + *((unsigned volatile int*)(appaddr)) = lword; + barrier(); +} +/*============================================================================*/ + +__inline__ unsigned int +regr(unsigned int regindex) +{ + register unsigned long appaddr; + register u_int lword; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0000FC00 + virt_guiregbase __MN__ ); + + lword = (*((unsigned volatile int*)(appaddr))); + + lword = (lword >> 16) | (lword << 16); /* swap words */ + lword = ((lword >> 8) & 0x00FF00FF) | ((lword << 8) & 0xFF00FF00); + + return(lword); +} +/*============================================================================*/ + +__inline__ void +regwB(unsigned int regindex, unsigned char regdata) +{ + register unsigned long appaddr; + /*--------------------------------------------------------------------------*/ + /* calculate aperture address */ + appaddr = ((regindex) + 0x0000FC00 + virt_guiregbase __MN__ ); + + *(char *)appaddr = regdata; + barrier(); +} +/*============================================================================*/ + +#endif /* _MAP_768K_IO_ */ + + +/*============================================================================*/ +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static int +M64_op_open(struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + OFuncId("M64_op_open(%p) \n", info); + /* + * Nothing, only a usage count for the moment + */ + + MOD_INC_USE_COUNT; + + return(0); +} +/*endproc M64_op_open() */ + +/*============================================================================*/ + +/*--------------------------------------------------------------------------*/ + +static int +M64_op_release(struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + FuncId("M64_op_release() \n"); + MOD_DEC_USE_COUNT; + return(0); +} +/*endproc M64_op_release() */ + +/*============================================================================*/ + + +/* -------------------- Hardware specific routines ------------------------ */ + + +/*--------------------------------------------------------------------------*/ + /* + * Initialization + * + * Set the default video mode for this chipset. If a video mode was + * specified on the command line, it will override the default mode. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_init( ARG_UINT08___MN_ ) + +/*--------------------------------------------------------------------------*/ +{ + struct fb_var_screeninfo * var_ptr = &mach64fb_predefined[0]; + struct mach64fb_par dummy_par; + + unsigned long board_addr; + u_int * u32_ptr; + u_int read_val; + int n; + int i; + + /*--------------------------------------------------------------------------*/ + FuncId("M64_hw_init() \n"); + + if(mach64_mode __MN__ == -1) + { + mach64_mode __MN__ = M64_8_DEFMODE; + } + /*endif*/ + + board_addr = virt_vmembase __MN__ ; + for (i = 0; i < 256; i++) + { + mach64_colormap __MN__ [i][0] = i; + mach64_colormap __MN__ [i][1] = i; + mach64_colormap __MN__ [i][2] = i; + mach64_colormap __MN__ [i][3] = 0; + } + +#ifdef _DUMP_IO_REGS_ + u32_ptr = (u_int *)(0x000002EC + virt_vgaiobase __MN__ ); + n = 0; + while(n < 0x20) + { + Dprint("\n%08X: ", u32_ptr); + Dprint("%08X ", INL(0x02EC + (n << 10)) ); n++; + Dprint("%08X ", INL(0x02EC + (n << 10)) ); n++; + Dprint("%08X ", INL(0x02EC + (n << 10)) ); n++; + Dprint("%08X ", INL(0x02EC + (n << 10)) ); n++; + u32_ptr += 0x0400; + } + /*endwhile*/ + Dprint("\n" ); +#endif + + WaitIdleEmpty(); /* Make sure that all commands have finished */ + read_val = regr(GEN_TEST_CNTL); + if(0) + { + regw(GEN_TEST_CNTL, read_val | 0x0200); + } + else + { + regw(GEN_TEST_CNTL, read_val & ~0x0200); + } + /*endif*/ + + WaitQueue(13); + regw(SRC_OFF_PITCH, (mach64_xres __MN__ << 19)); + regw(DST_OFF_PITCH, (mach64_xres __MN__ << 19)); + regw(SC_LEFT_RIGHT, (mach64_xres __MN__ -1) << 16); + regw(SC_TOP_BOTTOM, (mach64_yres __MN__ -1) << 16); + + regw(DP_BKGD_CLR, 0x00000000); + regw(DP_FRGD_CLR, 0x00000001); + + regw(DP_WRITE_MASK, 0x000000FF /* pGC->planemask */ ); + regw(DP_PIX_WIDTH, BYTE_ORDER_MSB_TO_LSB | HOST_8BPP | SRC_8BPP | DST_8BPP); + regw(DP_MIX, FRGD_MIX_S | BKGD_MIX_D); + regw(DP_SRC, FRGD_SRC_BLIT | BKGD_SRC_BKGD_CLR); + + regw(CLR_CMP_CNTL, 0x00000000); + regw(CLR_CMP_CLR, 0x00000000); + + regw(GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + + + +#ifdef _DUMP_GUIREGS_0BFC00_ + +#ifdef _MAP_768K_IO_ + u32_ptr = (u_int *)(0x0003FC00 + virt_vgaiobase __MN__ ); +#else + u32_ptr = (u_int *)(0x0000FC00 + virt_guiregbase __MN__ ); +#endif + n = 0; + while(n < 0x100) + { + Dprint("\n%08X: ", u32_ptr); + Dprint("%08X ", regr(n << 2) ); n++; + Dprint("%08X ", regr(n << 2) ); n++; + Dprint("%08X ", regr(n << 2) ); n++; + Dprint("%08X ", regr(n << 2) ); n++; + u32_ptr += 4; + } + /*endwhile*/ + Dprint("\n" ); +#endif + +#ifdef _DUMP_GUIREGS_3FFC00_ + u32_ptr = (u_int *)(0x003FFC00 + virt_vmembase __MN__ ); + n = 0; + while(n < 0x100) + { + Dprint("\n%08X: ", u32_ptr); + Dprint("%08lX ", regrd(n << 2) ); n++; + Dprint("%08lX ", regrd(n << 2) ); n++; + Dprint("%08lX ", regrd(n << 2) ); n++; + Dprint("%08lX ", regrd(n << 2) ); n++; + u32_ptr += 4; + } + /*endwhile*/ + + Dprint("\n" ); +#endif + + + + dummy_par.xres = mach64_xres __MN__ ; + dummy_par.yres = mach64_yres __MN__ ; + dummy_par.bpp = mach64_depth __MN__ ; + M64_hw_encode_var(var_ptr, &dummy_par); + + mach64fb_debug = 0x018FC100; + + M64_hw_setcolreg (255, 56, 100, 160, 0, NULL /* unused */); + M64_hw_setcolreg (254, 0, 0, 0, 0, NULL /* unused */); + + FuncDone("M64_hw_init() done.\n"); + return(1); /* detected_mode */ +} +/*endproc M64_hw_init() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * This function should fill in the `fix' structure based on the + * values in the `par' structure. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_encode_fix(struct fb_fix_screeninfo * fix, struct mach64fb_par * par) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + int i; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_encode_fix() \n"); + + strcpy(fix->id, mach64fb_name); + fix->id[15] = _MN_ ; + fix->smem_start = (caddr_t) virt_vmembase __MN__ ; + + /* aufrunden */ + fix->smem_len = (phys_size __MN__ + PAGE_SIZE - 0x00200001) & PAGE_MASK; + + if(mach64_depth __MN__ == 1) + { + fix->type = FB_TYPE_PACKED_PIXELS; + /* The letters 'n' and 'i' in the "video=Mach64:" stand + * for "normal" and "inverted", rsp., in the monochrome case */ + fix->visual = + (mach64_pmode __MN__ == FB_TYPE_INTERLEAVED_PLANES || + mach64_pmode __MN__ == FB_TYPE_PACKED_PIXELS) ? + FB_VISUAL_MONO10 : FB_VISUAL_MONO01; + } + else /* depth > 1 */ + { + switch(mach64_pmode __MN__ ) + { + /* All visuals are STATIC, because we don't know how to change + * colors :-( + */ + case -1: /* truecolor */ + fix->type = FB_TYPE_PACKED_PIXELS; + fix->visual = FB_VISUAL_TRUECOLOR; + break; + case FB_TYPE_PACKED_PIXELS: + fix->type = FB_TYPE_PACKED_PIXELS; + fix->visual = FB_VISUAL_STATIC_PSEUDOCOLOR; + break; + case FB_TYPE_PLANES: + fix->type = FB_TYPE_PLANES; + fix->visual = FB_VISUAL_STATIC_PSEUDOCOLOR; + break; + case FB_TYPE_INTERLEAVED_PLANES: + fix->type = FB_TYPE_INTERLEAVED_PLANES; + fix->type_aux = 2; + fix->visual = FB_VISUAL_STATIC_PSEUDOCOLOR; + break; + } + /*endswitch*/ + } + /*endif*/ + fix->xpanstep = 0; + fix->ypanstep = 0; + fix->ywrapstep = 0; + fix->line_length = 0; + + for(i = 0; i < arraysize(fix->reserved); i++) + fix->reserved[i] = 0; + + CFuncId("M64_hw_encode_fix() done. \n"); + return(0); +} +/*endproc _encode_fix() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Get the video params out of `var'. If a value doesn't fit, round + * it up, if it's too big, return -EINVAL. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_decode_var(struct fb_var_screeninfo * var, struct mach64fb_par * par) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_decode_var() \n"); + + par->xres = var->xres; + par->yres = var->yres; + par->bpp = var->bits_per_pixel; + + return(0); +} +/*endproc _decode_var() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Fill the `var' structure based on the values in `par' and maybe + * other values read out of the hardware. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_encode_var(struct fb_var_screeninfo * var, struct mach64fb_par * par) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + int i; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_encode_var() \n"); + + var->xres = par->xres; + var->yres = par->yres; + var->xres_virtual = par->xres; + var->yres_virtual = par->yres; + var->xoffset = 0; + var->yoffset = 0; + + var->bits_per_pixel = par->bpp; + var->grayscale = 0; + + if(par->bpp == 8) + { + var->red.offset = 0; + var->red.length = + (virt_vgaiobase __MN__ ? mach64_bitspercol __MN__ : 0); + var->red.msb_right = 0; + var->blue = var->green = var->red; + } + else + { + var->red.offset = 11; + var->red.length = 5; + var->red.msb_right = 0; + var->green.offset = 5; + var->green.length = 6; + var->green.msb_right = 0; + var->blue.offset = 0; + var->blue.length = 5; + var->blue.msb_right = 0; + } + var->transp.offset = 0; + var->transp.length = 0; + var->transp.msb_right = 0; + + var->nonstd = 0; + var->activate = 0; + + var->height = -1; + var->width = -1; + var->accel = mach64_use_accel __MN__ ; + var->vmode = FB_VMODE_NONINTERLACED; + + /* Dummy values */ + + if (par->bpp == 8) + var->pixclock = M64_8_PIXCLOCK; + else + var->pixclock = M64_16_PIXCLOCK; + var->sync = 0; + var->left_margin = 64; + var->right_margin = 96; + var->upper_margin = 35; + var->lower_margin = 12; + var->hsync_len = 112; + var->vsync_len = 2; + + for(i = 0; i < arraysize(var->reserved); i++) + var->reserved[i] = 0; + + return(0); +} +/*endproc _encode_var() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Set a single color register. The values supplied are already + * rounded down to the hardware's capabilities (according to the + * entries in the var structure). Return != 0 for invalid regno. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_setcolreg(u_int regno, + u_int red, + u_int green, + u_int blue, + u_int transp, + struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + unsigned short colmask; + unsigned short colshift; + + /*--------------------------------------------------------------------------*/ + OFuncId("M64_hw_setcolreg(%02X) \n", regno); + + if(regno > 255) return (1); + mach64_colormap __MN__ [regno][0] = red; + mach64_colormap __MN__ [regno][1] = green; + mach64_colormap __MN__ [regno][2] = blue; + mach64_colormap __MN__ [regno][3] = transp; + + if(! phys_vgaiobase) return 1; + + colmask = (1 << mach64_bitspercol __MN__ ) - 1; + colshift = 8 - mach64_bitspercol __MN__ ; + + OUTB(0x3c8, regno); + DACDelay; + OUTB(0x3c9, (red >> colshift) & colmask); + DACDelay; + OUTB(0x3c9, (green >> colshift) & colmask); + DACDelay; + OUTB(0x3c9, (blue >> colshift) & colmask); + DACDelay; + + return (0); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Read a single color register and split it into + * colors/transparent. Return != 0 for invalid regno. + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_hw_getcolreg(u_int regno, + u_int * red, + u_int * green, + u_int * blue, + u_int * transp, + struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + /*--------------------------------------------------------------------------*/ + OFuncId("M64_hw_getcolreg() \n"); + + if(regno >= 256) return (1); + + *red = mach64_colormap __MN__ [regno][0]; + *green = mach64_colormap __MN__ [regno][1]; + *blue = mach64_colormap __MN__ [regno][2]; + *transp = mach64_colormap __MN__ [regno][3]; + + /* + OUTB(0x3c7, regno); + DACDelay; + *red = INB(0x3c9) & colmask; + DACDelay; + *green = INB(0x3c9) & colmask; + DACDelay; + *blue = INB(0x3c9) & colmask; + DACDelay; + */ + + return (0); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * (Un)Blank the screen: Set all colors = RGB 000 or back + */ +/*--------------------------------------------------------------------------*/ + +void +M64_hw_blank(int blank) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + int regno; + + unsigned short colmask; + unsigned short colshift; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_blank() \n"); + + if(blank) + { + for(regno = 0; regno < 256; regno++) + { + OUTB(0x3c8, regno); + DACDelay; + OUTB(0x3c9, 0); + DACDelay; + OUTB(0x3c9, 0); + DACDelay; + OUTB(0x3c9, 0); + DACDelay; + + } + /*nexxt regno*/ + } + else + { + colmask = (1 << mach64_bitspercol __MN__ ) - 1; + colshift = 8 - mach64_bitspercol __MN__ ; + for (regno = 0; regno < 256; regno++) + { + OUTB(0x3c8, regno); + DACDelay; + OUTB(0x3c9, (mach64_colormap __MN__ [regno][0] >> colshift) & colmask); + DACDelay; + OUTB(0x3c9, (mach64_colormap __MN__ [regno][1] >> colshift) & colmask); + DACDelay; + OUTB(0x3c9, (mach64_colormap __MN__ [regno][2] >> colshift) & colmask); + } + /*nexxt regno*/ + } + /*endif*/ + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ +/* + * We are waiting for "fifo" FIFO-slots empty + */ +/*--------------------------------------------------------------------------*/ + +void +Mach64_WaitQueue (u_short fifo) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64_WaitQueue() \n"); + + WaitQueue(16); + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ +/* + * We are waiting for Hardware (Graphics Engine) not busy + */ +/*--------------------------------------------------------------------------*/ + +void +Mach64_WaitBlit (void) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64_WaitBlit() \n"); + + WaitIdleEmpty(); /* Make sure that all commands have finished */ + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ +/* + * BitBLT - Through the Plane + */ +/*--------------------------------------------------------------------------*/ + +void +Mach64_BitBLT ( + int xSrc, + int ySrc, + int xDst, + int yDst, + u_int wSrc, + u_int hSrc, + u_short mode) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + u_int direction; + + /*--------------------------------------------------------------------------*/ + CFuncId("BB(%03X,%03X,%03X,%03X,%03X,%03X,%X) ", + xSrc, ySrc, xDst, yDst, wSrc, hSrc, mode); + /* Set drawing direction */ + /* -Y, X maj, -X (default) */ + +#if 1 + + direction = 0; + + if(ySrc < yDst) + { + yDst += hSrc - 1; + ySrc += hSrc - 1; + } + else + { + direction |= DST_Y_TOP_TO_BOTTOM; + } + /*endif*/ + if(xSrc < xDst) + { + xDst += wSrc - 1; + xSrc += wSrc - 1; + } + else + { + direction |= DST_X_LEFT_TO_RIGHT; + } + /*endif*/ + + + WaitQueue(4); + regw(DP_WRITE_MASK, 0x000000FF /* pGC->planemask */ ); + regw(DP_MIX, (mach64alu[mode] << 16) | MIX_DST); + regw(DP_SRC, FRGD_SRC_BLIT); + + regw(GUI_TRAJ_CNTL, direction); + +/* + MACH64_BIT_BLT(xSrc, ySrc, xDst, yDst, wSrc, hSrc, direction); +*/ + WaitQueue(4); + regw(SRC_Y_X, (((xSrc) << 16) | (ySrc) )); + regw(SRC_WIDTH1, (wSrc)); + regw(DST_Y_X, (((xDst) << 16) | (yDst) )); + regw(DST_HEIGHT_WIDTH, (((wSrc) << 16) | (hSrc) )); + + WaitIdleEmpty(); /* Make sure that all commands have finished */ + + /* + * Make sure that the destination trajectory is correctly set + * for subsequent calls. MACH64_BIT_BLT is the only function that + * currently changes the destination trajectory from L->R and T->B. + */ + regw(DST_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); + +#endif + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ +/* + * Rectangle Fill Solid + */ +/*--------------------------------------------------------------------------*/ + +void +Mach64_RectFill( + int x, + int y, + u_int wSrc, + u_int hSrc, + u_int mode, + u_int color) + +/*--------------------------------------------------------------------------*/ +{ + +#if 1 + + /*--------------------------------------------------------------------------*/ + CFuncId("RF(%03X,%03X,%03X,%03X,%X) ", + x, y, wSrc, hSrc, mode); + + WaitQueue(5); + regw(DP_FRGD_CLR, color /* pGC->fgPixel */ ); + regw(DP_WRITE_MASK, 0x000000FF /* pGC->planemask */ ); + regw(DP_MIX, (mach64alu[mode] << 16) | MIX_DST); + regw(DP_SRC, FRGD_SRC_FRGD_CLR); + + regw(DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + + if ((wSrc > 0) && (hSrc > 0)) + { + /* Bprint("q\n"); */ + WaitQueue(2); + regw(DST_Y_X, (((u_int)x << 16) | ((u_int)y & 0x0000ffff))); + regw(DST_HEIGHT_WIDTH, (((u_int)wSrc << 16) | hSrc)); + } + + WaitIdleEmpty(); /* Make sure that all commands have finished */ + +#endif + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ +/* + * Move cursor to x, y + */ +/*--------------------------------------------------------------------------*/ + +void +Mach64_MoveCursor (u_short x, u_short y) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64_MoveCursor() \n"); + + + return; +} +/*endproc Mach64_MoveCursor()*/ + +/*============================================================================*/ + + +/* -------------------- Generic routines ------------------------------------ */ + + +/*--------------------------------------------------------------------------*/ + /* + * Fill the hardware's `par' structure. + */ +/*--------------------------------------------------------------------------*/ + +static void +M64_hw_get_par(struct mach64fb_par * par) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_get_par() \n"); + if(current_par_valid __MN__ ) + { + *par = current_par __MN__ ; + } + else /* use a default, initialize */ + { + fbhws_ptr->decode_var( + &mach64fb_predefined[mach64_mode __MN__ ], + par); + } + /*endif*/ + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static void +M64_hw_set_par(struct mach64fb_par * par) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_hw_set_par() \n"); + current_par __MN__ = *par; + current_par_valid __MN__ = 1; + + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static int +do_fb_set_var(struct fb_var_screeninfo * var, int isactive) + +/*--------------------------------------------------------------------------*/ +{ + int err, activate; + struct mach64fb_par par; + + /*--------------------------------------------------------------------------*/ + CFuncId("do_fb_set_var() \n"); + if((err = fbhws_ptr->decode_var(var, &par))) + return(err); + activate = var->activate; + if((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) + { + M64_hw_set_par(&par); + } + /*endif*/ + fbhws_ptr->encode_var(var, &par); + var->activate = activate; + return(0); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static void +do_install_cmap(int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("do_install_cmap() \n"); + + if(con != currcon) return; + + if(fb_display[con].cmap.len) + { + fb_set_cmap(&fb_display[con].cmap, + &fb_display[con].var, + 1, + fbhws_ptr->setcolreg, + info); + } + else + { + fb_set_cmap(fb_default_cmap(1<setcolreg, + info); + } + /*endif*/ + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Get the Fixed Part of the Display + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_get_fix(struct fb_fix_screeninfo * fix, int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + struct mach64fb_par par; + int status = 0; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_op_get_fix() \n"); + if (con == -1) + { + M64_hw_get_par(&par); + } + else + { + status = fbhws_ptr->decode_var(&fb_display[con].var, &par); + } + /*endif*/ + return(status ? status : fbhws_ptr->encode_fix(fix, &par)); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Get the User Defined Part of the Display + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + struct mach64fb_par par; + int status = 0; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_op_get_var() \n"); + if(con == -1) + { + M64_hw_get_par(&par); + status = fbhws_ptr->encode_var(var, &par); + } + else + { + *var = fb_display[con].var; + } + /*endif*/ + return(status); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static void +mach64fb_set_disp(int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + struct display * disp_p; + struct fb_fix_screeninfo fix; + + /*--------------------------------------------------------------------------*/ + CFuncId("mach64fb_set_disp() \n"); + + if(con >= 0) + disp_p = &fb_display[con]; + else + disp_p = &m_disp __MN__ ; /* used during initialization */ + + M64_op_get_fix(&fix, con, info); + + if(con == -1) con = 0; + + disp_p->screen_base = (u_char *)fix.smem_start; + disp_p->visual = fix.visual; + disp_p->type = fix.type; + disp_p->type_aux = fix.type_aux; + disp_p->ypanstep = fix.ypanstep; + disp_p->ywrapstep = fix.ywrapstep; + disp_p->line_length = fix.line_length; + if(fix.visual != FB_VISUAL_PSEUDOCOLOR && fix.visual != FB_VISUAL_DIRECTCOLOR) + { + disp_p->can_soft_blank = 0; /* aus atari_ */ + } + else + { + disp_p->can_soft_blank = 1; + } + /*endif*/ + + disp_p->can_soft_blank = 1; /* aus Cyber_ */ + disp_p->inverse = mach64_inverse __MN__ ; + + switch (disp_p->var.bits_per_pixel) { + case 8: + disp_p->dispsw = mach64_use_accel __MN__ ? &fbcon_mach64_8 : &fbcon_cfb8; + break; + case 16: + disp_p->dispsw = &fbcon_cfb16; + break; + default: + disp_p->dispsw = NULL; + break; + } + return; +} +/*endproc mach64fb_set_disp() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Set the User Defined Part of the Display + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_set_var(struct fb_var_screeninfo * var, int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp; + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_op_set_var() \n"); + + if((err = do_fb_set_var(var, con == currcon))) + return(err); + if((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) + { + oldxres = fb_display[con].var.xres; + oldyres = fb_display[con].var.yres; + oldvxres = fb_display[con].var.xres_virtual; + oldvyres = fb_display[con].var.yres_virtual; + oldbpp = fb_display[con].var.bits_per_pixel; + fb_display[con].var = *var; + if(oldxres != var->xres || oldyres != var->yres || + oldvxres != var->xres_virtual || oldvyres != var->yres_virtual || + oldbpp != var->bits_per_pixel) + { + mach64fb_set_disp(con, info); + (*fb_info __MN__ .changevar)(con); + fb_alloc_cmap(&fb_display[con].cmap, 0, 0); + do_install_cmap(con, info); + } + } + /*endif*/ + var->activate = 0; + + return(0); +} +/*endproc M64_op_set_var() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Get the Colormap + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_get_cmap(struct fb_cmap * cmap, int kspc, int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + OFuncId("M64_op_get_cmap() \n"); + + if(con == currcon) /* current console? */ + { + return(fb_get_cmap(cmap, &fb_display[con].var, kspc, fbhws_ptr->getcolreg, + info)); + } + else if(fb_display[con].cmap.len) /* non default colormap? */ + { + fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); + } + else + { + fb_copy_cmap(fb_default_cmap(1<setcolreg, + info)); + } + else + { + fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1); + } + /*endif*/ + + return(0); +} +/*endproc M64_op_set_cmap() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Pan or Wrap the Display + * + * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_pan_display(struct fb_var_screeninfo *var, int con, + struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64_pan_display() \n"); + + return(-EINVAL); +} +/*endproc M64_op_pan_display() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Mach 64 Frame Buffer Specific ioctls + */ +/*--------------------------------------------------------------------------*/ + +static int +M64_op_ioctl( + struct inode * inode, + struct file * file, + u_int cmd, + u_long arg, + int con, + struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + /*--------------------------------------------------------------------------*/ + CFuncId("M64_op_ioctl($%08X %d) \n", cmd, con); + switch (cmd) + { + +#ifdef FBCMD_GET_CURRENTPAR + case FBCMD_GET_CURRENTPAR: + { + if (copy_to_user((void *)arg, (void *)¤t_par __MN__ , + sizeof(struct mach64fb_par))) + return -EFAULT; + return 0; + } + /*endcase*/ +#endif + +#ifdef FBCMD_SET_CURRENTPAR + case FBCMD_SET_CURRENTPAR: + { + + if (copy_from_user((void *)¤t_par __MN__ , (void *)arg, + sizeof(struct mach64fb_par))) + return -EFAULT; + M64_hw_set_par(¤t_par __MN__ ); + return 0; + } + /*endcase*/ +#endif + + } + /*endswitch*/ + return(-EINVAL); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +int +Mach64_probe(void) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + FuncId("Mach64_probe() \n"); + mach64_key = 0; + return(mach64_key); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +__initfunc( +void +mach64fb_setup(char * options, int * ints) +) +/*--------------------------------------------------------------------------*/ +{ + DECLARE_STATIC_UINT08___MN_ + + char * this_opt; + char mach64_str[80]; + + /*--------------------------------------------------------------------------*/ + FuncId("mach64fb_setup() '%s'\n", options); + + fb_info __MN__ .fontname[0] = '\0'; + + if(!options || !*options) return; + + for(this_opt = strtok(options, ","); this_opt; this_opt = strtok(NULL, ",")) + { + if (!strcmp(this_opt, "inverse")) + { + mach64_inverse __MN__ = 1; + fb_invert_cmaps(); + } + else if (!strncmp(this_opt, "font:", 5)) + { + strcpy(fb_info __MN__ .fontname, this_opt + 5); + } + else if (!strncmp(this_opt,"Mach64:", 7)) + { + strncpy(mach64_str, this_opt + 7, 80); + store_video_par(mach64_str _ADD_ARG_MN_ ); + _INC_MN_ ; + mach64_count = _MN_ ; + } + else + { + mach64_mode __MN__ = get_video_mode(this_opt); + } + /*endif*/ + } + /*next this_opt*/ + + return; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static int +store_video_par(char* video_str ADD_ARG_UINT08___MN_ ) + +/*--------------------------------------------------------------------------*/ +{ + char * p; + unsigned long sm_addr, sm_size; + + int xres, yres, depth; + short int pmode; + short int use_accel; + + /*--------------------------------------------------------------------------*/ + CFuncId("store_video_par(%d) \n", _MN_ ); + /* Format is: ;;;; + * + * [;[;[;]]] + */ + + use_accel = 0; + if (!(p = strtoke(video_str, ";")) || !*p) goto mach64_invalid; + xres = simple_strtoul(p, NULL, 10); + if (xres <= 0) goto mach64_invalid; + + if (!(p = strtoke(NULL, ";")) || !*p) goto mach64_invalid; + yres = simple_strtoul(p, NULL, 10); + if (yres <= 0) goto mach64_invalid; + + if (!(p = strtoke(NULL, ";")) || !*p) goto mach64_invalid; + depth = simple_strtoul(p, NULL, 10); + if (depth != 1 && depth != 2 && depth != 4 && depth != 8 && + depth != 16 && depth != 24) goto mach64_invalid; + + if (!(p = strtoke(NULL, ";")) || !*p) goto mach64_invalid; + if (*p == 'i') + pmode = FB_TYPE_INTERLEAVED_PLANES; + else if (*p == 'p') + pmode = FB_TYPE_PACKED_PIXELS; + else if (*p == 'n') + pmode = FB_TYPE_PLANES; + else if (*p == 't') + pmode = -1; /* true color */ + else + goto mach64_invalid; + + + if (!(p = strtoke(NULL, ";")) ||!*p) goto mach64_invalid; + sm_addr = simple_strtoul(p, NULL, 0); + + if (!(p = strtoke(NULL, ";")) ||!*p) + sm_size = xres * yres * depth / 8; + else + sm_size = simple_strtoul(p, NULL, 0); + + if ((p = strtoke(NULL, ";")) && *p) + phys_vgaiobase __MN__ = simple_strtoul(p, NULL, 0); + + if ((p = strtoke(NULL, ";")) && *p) + { + mach64_bitspercol __MN__ = simple_strtoul(p, NULL, 0); + if (mach64_bitspercol __MN__ > 8) + mach64_bitspercol __MN__ = 8; + else if (mach64_bitspercol __MN__ < 1) + mach64_bitspercol __MN__ = 1; + } + /*endif*/ + + if ((p = strtoke(NULL, ";")) && *p) + phys_guiregbase __MN__ = simple_strtoul(p, NULL, 0); + + if ((p = strtoke(NULL, ";")) && *p) + { + if(*p == 'a') use_accel = FB_ACCEL_MACH64; + + } + /*endif*/ + + mach64_xres __MN__ = xres; + mach64_yres __MN__ = yres; + mach64_depth __MN__ = depth; + mach64_pmode __MN__ = pmode; + mach64_use_accel __MN__ = use_accel; + phys_vmembase __MN__ = sm_addr; + phys_size __MN__ = sm_size; + + return(0); + + /*--------------------------------------------------------------------------*/ + mach64_invalid: + + phys_vmembase __MN__ = 0; + + return(-1); +} +/*endproc*/ + +/*============================================================================*/ + + +/* a strtok which returns empty strings, too */ + +/*--------------------------------------------------------------------------*/ + +static char * +strtoke(char * s, const char * ct) + +/*--------------------------------------------------------------------------*/ +{ + static char *ssave = NULL; + char *sbegin, *send; + + /*--------------------------------------------------------------------------*/ + sbegin = s ? s : ssave; + if (!sbegin) { + return NULL; + } + if (*sbegin == '\0') { + ssave = NULL; + return NULL; + } + send = strpbrk(sbegin, ct); + if (send && *send != '\0') + *send++ = '\0'; + ssave = send; + return sbegin; +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Initialization + */ +/*--------------------------------------------------------------------------*/ + +__initfunc( +unsigned long +mach64fb_init(unsigned long mem_start) +) +/*--------------------------------------------------------------------------*/ +{ + static unsigned long virt_dummy; + static u_char fb_init_count; + DECLARE_STATIC_UINT08___MN_ + + struct mach64fb_par par; + int err; + DECLARE_UINT08___MN_ + + /*--------------------------------------------------------------------------*/ + FuncId("mach64fb_init($%08lX) \n", mem_start); + + /* + _MN_ = fb_init_count; + */ + if(phys_vmembase __MN__ == 0) return mem_start; + + fb_init_count++; + + fbhws_ptr = &mach64_switch; + + /* Map the video memory (physical address given) to somewhere + * in the kernel address space. + */ + mem_start = (mem_start + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1); + virt_vmembase __MN__ = kernel_map( + phys_vmembase __MN__ , + phys_size __MN__ , +#ifdef _OHNE_HW_ACCEL_ + KERNELMAP_NO_COPYBACK, /* must be changed if hardware blit */ +#else + KERNELMAP_NOCACHE_SER, +#endif + &mem_start); + +#ifdef _MAP_GUIREGS_0BFC00_ + + if(phys_guiregbase __MN__ ) + { + virt_guiregbase __MN__ = kernel_map( + phys_guiregbase __MN__ , + 0x10000, /* 64 K */ + KERNELMAP_NOCACHE_SER, + &mem_start); + } + /*endif*/ + +#endif + + if(phys_vgaiobase __MN__ ) + { +/* + phys_guiregbase __MN__ = phys_vgaiobase __MN__ - 0x00100000 + 0x000B0000; +*/ + +#ifdef _MAP_768K_IO_ + + virt_vgaiobase __MN__ = kernel_map( + phys_vgaiobase __MN__ - 0x00080000, + 0x0C0000, /* 768 K */ + KERNELMAP_NOCACHE_SER, + &mem_start); + +#else + + if(phys_guiregbase __MN__ ) + { + virt_vgaiobase __MN__ = kernel_map( + phys_vgaiobase __MN__ , + 0x10000, /* 64 K */ + KERNELMAP_NOCACHE_SER, + &mem_start); + } + else + { + virt_vgaiobase __MN__ = 0x00080000 + kernel_map( + phys_vgaiobase __MN__ - 0x00080000, + 0x0C0000, /* 768 K */ + KERNELMAP_NOCACHE_SER, + &mem_start); + + Dprint(" faking virt_guiregbase to virt_vgaiobase - 0x00050000 \n"); + virt_guiregbase __MN__ = virt_vgaiobase __MN__ - 0x00050000; + } + /*endif*/ + +#endif /* _MAP_768K_IO_ */ + } + /*endif*/ + + Dprint(" phys_guiregbase=$%08lX virt_dummy=$%08lX\n", + phys_guiregbase __MN__ , + virt_dummy); + + +#ifdef _DUMP_KMAP_RANGE_ + dump_kmap_range(); +#endif + + + virt_size __MN__ = phys_size __MN__ & PAGE_MASK; /* abrunden */ + virt_size __MN__ = (phys_size __MN__ - 0x00200000) & PAGE_MASK; /* abrunden */ + + Dprint(" PAGE_MASK=$%08lX phys_size=$%08lX \n", PAGE_MASK, phys_size __MN__ ); + /* + memset((char *) virt_vmembase __MN__ , 0, virt_size __MN__ ); + */ + + strcpy(fb_info __MN__ .modename, mach64fb_name); + fb_info __MN__ .changevar = NULL; + fb_info __MN__ .node = -1; + fb_info __MN__ .fbops = &mach64fb_ops; + fb_info __MN__ .disp = &m_disp __MN__ ; + fb_info __MN__ .switch_con = &Mach64fb_switch; + fb_info __MN__ .updatevar = &Mach64fb_updatevar; + fb_info __MN__ .blank = &Mach64fb_blank; + strcat(fb_info __MN__ .modename, fb_var_names[mach64_mode __MN__ ]); + fb_info __MN__ .modename[39] = _MN_ ; + + err = register_framebuffer(&fb_info __MN__ ); + if(err < 0) + { + Eprint(" Cannot register frame buffer() \n" ); + return mem_start; + } + /*endif*/ + + fbhws_ptr->init( _ARG_MN_ ); + fbhws_ptr->decode_var(&mach64fb_predefined[mach64_mode __MN__ ], &par); + fbhws_ptr->encode_var(&mach64fb_predefined[0], &par); /* store resolution */ + + do_fb_set_var(&mach64fb_predefined[0], 1); + + M64_op_get_var(&m_disp __MN__ .var, -1, &fb_info); + /* fill in m_disp.var */ + mach64fb_set_disp(-1, &fb_info); /* fill in the rest of m_disp */ + + Iprint(" Determined %dx%d, depth %d $%08lX MEM @ $%08lX IO @ $%08lX $%08lX\n", + m_disp __MN__ .var.xres, + m_disp __MN__ .var.yres, + m_disp __MN__ .var.bits_per_pixel, + phys_size __MN__ , + phys_vmembase __MN__ , + phys_vgaiobase __MN__ , + phys_guiregbase __MN__ ); + do_install_cmap(0, &fb_info); + + Iprint( + " %s FB device %d, using %ldK of video MEM @ $%08lX IO @ $%08lX $%08lX\n", + fb_info __MN__ .modename, + _MN_ , + virt_size __MN__ >> 10, + virt_vmembase __MN__ , + virt_vgaiobase __MN__ , + virt_guiregbase __MN__ ); + + _INC_MN_ ; + + return mem_start; +} +/*endproc mach64fb_init() */ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + +static int +Mach64fb_switch(int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64fb_switch(%d) \n", con); + /* Do we have to save the colormap? */ + if (fb_display[currcon].cmap.len) + { + fb_get_cmap(&fb_display[currcon].cmap, + &fb_display[currcon].var, + 1, + fbhws_ptr->getcolreg, + info); + } + /*endif*/ + do_fb_set_var(&fb_display[con].var, 1); + currcon = con; + /* Install new colormap */ + do_install_cmap(con, info); + return(0); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Update the `var' structure (called by fbcon.c) + * + * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. + * Since it's called by a kernel driver, no range checking is done. + */ +/*--------------------------------------------------------------------------*/ + +static int +Mach64fb_updatevar(int con, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64fb_updatevar() \n"); + return(0); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Blank the display. + */ +/*--------------------------------------------------------------------------*/ + +static void +Mach64fb_blank(int blank, struct fb_info *info) + +/*--------------------------------------------------------------------------*/ +{ + /*--------------------------------------------------------------------------*/ + CFuncId("Mach64fb_blank() \n"); + fbhws_ptr->blank(blank); +} +/*endproc*/ + +/*============================================================================*/ + + +/*--------------------------------------------------------------------------*/ + /* + * Get a Video Mode + */ +/*--------------------------------------------------------------------------*/ + +static int +get_video_mode(const char * name) + +/*--------------------------------------------------------------------------*/ +{ + int i; + + /*--------------------------------------------------------------------------*/ + CFuncId("get_video_mode(%s) \n", name); + + for (i = 1; i < NUM_PREDEF_MODES; i++) + { + if (!strcmp(name, fb_var_names[i])) return(i); + } + /*next i*/ + return(0); +} +/*endproc*/ + +/*============================================================================*/ + + + /* + * Text console acceleration + */ + +/*--------------------------------------------------------------------------*/ + +static void +fbcon_mach64_8_bmove(struct display * p, + int sy, + int sx, + int dy, + int dx, + int height, + int width) + +/*--------------------------------------------------------------------------*/ +{ + u_char * src, * dst; + int bytes = p->next_line, + linesize = bytes * p->fontheight, + rows; + + /*--------------------------------------------------------------------------*/ + CFuncId("fbcon_mach64_8_bmove($%04X, $%04X, $%04X, $%04X) \n", + sy, sx, dy, dx, height, width); + + Mach64_BitBLT( + (sx << 3), + (sy * p->fontheight), + (dx << 3), + (dy * p->fontheight), + (width << 3), + (height * p->fontheight), + 3); /* MIX_SRC); see XGCValues GCFunction = GXCopy */ + + return; +} +/*endproc fbcon_mach64_8_bmove() */ + +/*============================================================================*/ + + +static void +fbcon_mach64_8_clear(struct vc_data * conp, + struct display * p, + int sy, /* in Characters von oben */ + int sx, + int height, /* in Characters */ + int width) /* in Characters */ + +/*--------------------------------------------------------------------------*/ +{ + register u_int * dest; + register u_int bgx; + register int i; + + u_char * dest0; + + int bytes_p_line = p->next_line, + lines_w = height * p->fontheight, + rows; + + /*--------------------------------------------------------------------------*/ + CFuncId("fbcon_mach64_8_clear($%04X, $%04X, $%04X, $%04X) \n", + sy, sx, height, width); + + bgx = attr_bgcol_ec(p, conp); + bgx |= (bgx << 8); + bgx |= (bgx << 16); + + Mach64_RectFill( + (sx << 3), + (sy * p->fontheight), + (width << 3), + (height * p->fontheight), + 3, /* MIX_SRC, see XGCValues GCFunction */ + bgx); + + return; +} +/*endproc fbcon_mach64_8_clear() */ + +/*============================================================================*/ + +static struct display_switch fbcon_mach64_8 = { + fbcon_cfb8_setup, +#ifdef _USE_HW_ACCEL_BLT_ + fbcon_mach64_8_bmove, +#else + fbcon_cfb8_bmove, +#endif +#ifdef _USE_HW_ACCEL_FILL_ + fbcon_mach64_8_clear, +#else + fbcon_cfb8_clear, +#endif + fbcon_cfb8_putc, fbcon_cfb8_putcs, fbcon_cfb8_revc +}; + + +/*--------------------------------------------------------------------------*/ + +/*============================================================================*/ +/* RCS-ID */ + + static char + rcs_id_h[] = MACH64FB_H_ID; + + static char + rcs_id_regs_h[] = MACH64REGS_H_ID; + + static char + rcs_id_c[] = + "@(#) Linux-m68k: 1997 11 21 17:13:00 BHA: mach64fb.c "; + +/* ^^^ */ +/* Please update this & put your initials here on every modification. */ +/* It can be checked with ' strings vmlinux | grep "@(#) " ' */ +/*============================================================================*/ --- m68k-2.1.79/drivers/video/mach64regs.h.orig Tue Jan 13 23:15:09 1998 +++ m68k-2.1.79/drivers/video/mach64regs.h Tue Jan 13 23:14:52 1998 @@ -0,0 +1,703 @@ +/* $Id: mach64regs.h,v 1.2 1998/01/02 14:38:13 geert Exp $ + * mach64regs.h: ISA/Ultra/PCI mach64 driver constants etc. + * + * Copyright 1997 David S. Miller (davem@caip.rutgers.edu) + * & Bernd Harries (harries@atlas.de) + * + * This is the file to be included by mach64 drivers. + * Files using the interfaces of the mach64fb driver + * (functions & IOCTL options) include mach64fb.h. + */ + + +#ifndef MACH64REGS_H +#define MACH64REGS_H + +struct mach64_info { + unsigned int color_mode; + unsigned int flags; + unsigned int total_vram; +}; + +/* The mach64_info flag bits. */ +#define MACH64_MASK_VT 0x00000001 + + +/* NON-GUI IO MAPPED Registers */ + +extern unsigned ioCONFIG_CHIP_ID; +extern unsigned ioCONFIG_CNTL; +extern unsigned ioSCRATCH_REG0; +extern unsigned ioSCRATCH_REG1; +extern unsigned ioCONFIG_STAT0; +extern unsigned ioMEM_CNTL; +extern unsigned ioDAC_REGS; +extern unsigned ioDAC_CNTL; +extern unsigned ioGEN_TEST_CNTL; +extern unsigned ioCLOCK_CNTL; +extern unsigned ioCRTC_GEN_CNTL; + +/* NON-GUI sparse IO register offsets */ + +#define sioCONFIG_CHIP_ID 0x1B +#define sioCONFIG_CNTL 0x1A +#define sioSCRATCH_REG0 0x10 +#define sioSCRATCH_REG1 0x11 +#define sioCONFIG_STAT0 0x1C +#define sioMEM_CNTL 0x14 +#define sioDAC_REGS 0x17 +#define sioDAC_CNTL 0x18 +#define sioGEN_TEST_CNTL 0x19 +#define sioCLOCK_CNTL 0x12 +#define sioCRTC_GEN_CNTL 0x07 + +/* NON-GUI MEMORY MAPPED Registers - expressed in BYTE offsets */ + +#define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 00 */ +#define CRTC_H_SYNC_STRT_WID 0x0004 /* Dword offset 01 */ +#define CRTC_H_SYNC_STRT 0x0004 +#define CRTC_H_SYNC_DLY 0x0005 +#define CRTC_H_SYNC_WID 0x0006 + +#define CRTC_V_TOTAL_DISP 0x0008 /* Dword offset 02 */ +#define CRTC_V_TOTAL 0x0008 +#define CRTC_V_DISP 0x000A +#define CRTC_V_SYNC_STRT_WID 0x000C /* Dword offset 03 */ +#define CRTC_V_SYNC_STRT 0x000C +#define CRTC_V_SYNC_WID 0x000E + +#define CRTC_VLINE_CRNT_VLINE 0x0010 /* Dword offset 04 */ +#define CRTC_OFF_PITCH 0x0014 /* Dword offset 05 */ +#define CRTC_INT_CNTL 0x0018 /* Dword offset 06 */ +#define CRTC_GEN_CNTL 0x001C /* Dword offset 07 */ + +#define OVR_CLR 0x0040 /* Dword offset 10 */ +#define OVR_WID_LEFT_RIGHT 0x0044 /* Dword offset 11 */ +#define OVR_WID_TOP_BOTTOM 0x0048 /* Dword offset 12 */ + +#define CUR_CLR0 0x0060 /* Dword offset 18 */ +#define CUR_CLR1 0x0064 /* Dword offset 19 */ +#define CUR_OFFSET 0x0068 /* Dword offset 1A */ +#define CUR_HORZ_VERT_POSN 0x006C /* Dword offset 1B */ +#define CRTC_PIX_WIDTH 0x001D +#define CRTC_FIFO 0x001E +#define CRTC_EXT_DISP 0x001F + +#define CUR_HORZ_VERT_OFF 0x0070 /* Dword offset 1C */ + +#define SCRATCH_REG0 0x0080 /* Dword offset 20 */ +#define SCRATCH_REG1 0x0084 /* Dword offset 21 */ + +#define CLOCK_CNTL 0x0090 /* Dword offset 24 */ + +#define BUS_CNTL 0x00A0 /* Dword offset 28 */ + +#define MEM_CNTL 0x00B0 /* Dword offset 2C */ + +#define MEM_VGA_WP_SEL 0x00B4 /* Dword offset 2D */ +#define MEM_VGA_RP_SEL 0x00B8 /* Dword offset 2E */ + +#define DAC_REGS 0x00C0 /* Dword offset 30 */ +#define DAC_W_INDEX 0x00C0 /* Dword offset 30 */ +#define DAC_DATA 0x00C1 /* Dword offset 30 */ +#define DAC_MASK 0x00C2 /* Dword offset 30 */ +#define DAC_R_INDEX 0x00C3 /* Dword offset 30 */ +#define DAC_CNTL 0x00C4 /* Dword offset 31 */ + +#define GEN_TEST_CNTL 0x00D0 /* Dword offset 34 */ + +#define CONFIG_CNTL 0x00DC /* Dword offset 37 (CT, ET, VT) */ +#define CONFIG_CHIP_ID 0x00E0 /* Dword offset 38 */ +#define CONFIG_STAT0 0x00E4 /* Dword offset 39 */ +#define CONFIG_STAT1 0x00E8 /* Dword offset 3A */ + + +/* GUI MEMORY MAPPED Registers */ + +#define DST_OFF_PITCH 0x0100 /* Dword offset 40 */ +#define DST_X 0x0104 /* Dword offset 41 */ +#define DST_Y 0x0108 /* Dword offset 42 */ +#define DST_Y_X 0x010C /* Dword offset 43 */ +#define DST_WIDTH 0x0110 /* Dword offset 44 */ +#define DST_HEIGHT 0x0114 /* Dword offset 45 */ +#define DST_HEIGHT_WIDTH 0x0118 /* Dword offset 46 */ +#define DST_X_WIDTH 0x011C /* Dword offset 47 */ +#define DST_BRES_LNTH 0x0120 /* Dword offset 48 */ +#define DST_BRES_ERR 0x0124 /* Dword offset 49 */ +#define DST_BRES_INC 0x0128 /* Dword offset 4A */ +#define DST_BRES_DEC 0x012C /* Dword offset 4B */ +#define DST_CNTL 0x0130 /* Dword offset 4C */ + +#define SRC_OFF_PITCH 0x0180 /* Dword offset 60 */ +#define SRC_X 0x0184 /* Dword offset 61 */ +#define SRC_Y 0x0188 /* Dword offset 62 */ +#define SRC_Y_X 0x018C /* Dword offset 63 */ +#define SRC_WIDTH1 0x0190 /* Dword offset 64 */ +#define SRC_HEIGHT1 0x0194 /* Dword offset 65 */ +#define SRC_HEIGHT1_WIDTH1 0x0198 /* Dword offset 66 */ +#define SRC_X_START 0x019C /* Dword offset 67 */ +#define SRC_Y_START 0x01A0 /* Dword offset 68 */ +#define SRC_Y_X_START 0x01A4 /* Dword offset 69 */ +#define SRC_WIDTH2 0x01A8 /* Dword offset 6A */ +#define SRC_HEIGHT2 0x01AC /* Dword offset 6B */ +#define SRC_HEIGHT2_WIDTH2 0x01B0 /* Dword offset 6C */ +#define SRC_CNTL 0x01B4 /* Dword offset 6D */ + +#define HOST_DATA0 0x0200 /* Dword offset 80 */ +#define HOST_DATA1 0x0204 /* Dword offset 81 */ +#define HOST_DATA2 0x0208 /* Dword offset 82 */ +#define HOST_DATA3 0x020C /* Dword offset 83 */ +#define HOST_DATA4 0x0210 /* Dword offset 84 */ +#define HOST_DATA5 0x0214 /* Dword offset 85 */ +#define HOST_DATA6 0x0218 /* Dword offset 86 */ +#define HOST_DATA7 0x021C /* Dword offset 87 */ +#define HOST_DATA8 0x0220 /* Dword offset 88 */ +#define HOST_DATA9 0x0224 /* Dword offset 89 */ +#define HOST_DATAA 0x0228 /* Dword offset 8A */ +#define HOST_DATAB 0x022C /* Dword offset 8B */ +#define HOST_DATAC 0x0230 /* Dword offset 8C */ +#define HOST_DATAD 0x0234 /* Dword offset 8D */ +#define HOST_DATAE 0x0238 /* Dword offset 8E */ +#define HOST_DATAF 0x023C /* Dword offset 8F */ +#define HOST_CNTL 0x0240 /* Dword offset 90 */ + +#define PAT_REG0 0x0280 /* Dword offset A0 */ +#define PAT_REG1 0x0284 /* Dword offset A1 */ +#define PAT_CNTL 0x0288 /* Dword offset A2 */ + +#define SC_LEFT 0x02A0 /* Dword offset A8 */ +#define SC_RIGHT 0x02A4 /* Dword offset A9 */ +#define SC_LEFT_RIGHT 0x02A8 /* Dword offset AA */ +#define SC_TOP 0x02AC /* Dword offset AB */ +#define SC_BOTTOM 0x02B0 /* Dword offset AC */ +#define SC_TOP_BOTTOM 0x02B4 /* Dword offset AD */ + +#define DP_BKGD_CLR 0x02C0 /* Dword offset B0 */ +#define DP_FRGD_CLR 0x02C4 /* Dword offset B1 */ +#define DP_WRITE_MASK 0x02C8 /* Dword offset B2 */ +#define DP_CHAIN_MASK 0x02CC /* Dword offset B3 */ +#define DP_PIX_WIDTH 0x02D0 /* Dword offset B4 */ +#define DP_MIX 0x02D4 /* Dword offset B5 */ +#define DP_SRC 0x02D8 /* Dword offset B6 */ + +#define CLR_CMP_CLR 0x0300 /* Dword offset C0 */ +#define CLR_CMP_MASK 0x0304 /* Dword offset C1 */ +#define CLR_CMP_CNTL 0x0308 /* Dword offset C2 */ + +#define FIFO_STAT 0x0310 /* Dword offset C4 */ + +#define CONTEXT_MASK 0x0320 /* Dword offset C8 */ +#define CONTEXT_LOAD_CNTL 0x032C /* Dword offset CB */ + +#define GUI_TRAJ_CNTL 0x0330 /* Dword offset CC */ +#define GUI_STAT 0x0338 /* Dword offset CE */ + + +/* CRTC control values */ + +#define CRTC_H_SYNC_NEG 0x00200000 +#define CRTC_V_SYNC_NEG 0x00200000 + +#define CRTC_DBL_SCAN_EN 0x00000001 +#define CRTC_INTERLACE_EN 0x00000002 +#define CRTC_HSYNC_DIS 0x00000004 +#define CRTC_VSYNC_DIS 0x00000008 +#define CRTC_CSYNC_EN 0x00000010 +#define CRTC_PIX_BY_2_EN 0x00000020 + +#define CRTC_PIX_WIDTH 0x00000700 +#define CRTC_PIX_WIDTH_4BPP 0x00000100 +#define CRTC_PIX_WIDTH_8BPP 0x00000200 +#define CRTC_PIX_WIDTH_15BPP 0x00000300 +#define CRTC_PIX_WIDTH_16BPP 0x00000400 +#define CRTC_PIX_WIDTH_24BPP 0x00000500 +#define CRTC_PIX_WIDTH_32BPP 0x00000600 + +#define CRTC_BYTE_PIX_ORDER 0x00000800 +#define CRTC_PIX_ORDER_MSN_LSN 0x00000000 +#define CRTC_PIX_ORDER_LSN_MSN 0x00000800 + +#define CRTC_FIFO_LWM 0x000f0000 +#define CRTC_EXT_DISP_EN 0x01000000 +#define CRTC_EXT_EN 0x02000000 + +#define CRTC_CRNT_VLINE 0x07f00000 +#define CRTC_VBLANK 0x00000001 + +/* DAC control values */ + +#define DAC_EXT_SEL_RS2 0x01 +#define DAC_EXT_SEL_RS3 0x02 +#define DAC_8BIT_EN 0x00000100 +#define DAC_PIX_DLY_MASK 0x00000600 +#define DAC_PIX_DLY_0NS 0x00000000 +#define DAC_PIX_DLY_2NS 0x00000200 +#define DAC_PIX_DLY_4NS 0x00000400 +#define DAC_BLANK_ADJ_MASK 0x00001800 +#define DAC_BLANK_ADJ_0 0x00000000 +#define DAC_BLANK_ADJ_1 0x00000800 +#define DAC_BLANK_ADJ_2 0x00001000 + + +/* Mix control values */ + +#define MIX_NOT_DST 0x0000 +#define MIX_0 0x0001 +#define MIX_1 0x0002 +#define MIX_DST 0x0003 +#define MIX_NOT_SRC 0x0004 +#define MIX_XOR 0x0005 +#define MIX_XNOR 0x0006 +#define MIX_SRC 0x0007 +#define MIX_NAND 0x0008 +#define MIX_NOT_SRC_OR_DST 0x0009 +#define MIX_SRC_OR_NOT_DST 0x000a +#define MIX_OR 0x000b +#define MIX_AND 0x000c +#define MIX_SRC_AND_NOT_DST 0x000d +#define MIX_NOT_SRC_AND_DST 0x000e +#define MIX_NOR 0x000f + +/* Maximum engine dimensions */ +#define ENGINE_MIN_X 0 +#define ENGINE_MIN_Y 0 +#define ENGINE_MAX_X 4095 +#define ENGINE_MAX_Y 16383 + +/* Mach64 engine bit constants - these are typically ORed together */ + +/* BUS_CNTL register constants */ +#define BUS_FIFO_ERR_ACK 0x00200000 +#define BUS_HOST_ERR_ACK 0x00800000 + +/* GEN_TEST_CNTL register constants */ +#define GEN_OVR_OUTPUT_EN 0x20 +#define HWCURSOR_ENABLE 0x80 +#define GUI_ENGINE_ENABLE 0x100 +#define BLOCK_WRITE_ENABLE 0x200 + +/* CLOCK_CNTL register constants */ +#define CLOCK_SEL 0x0f +#define CLOCK_DIV 0x30 +#define CLOCK_DIV1 0x00 +#define CLOCK_DIV2 0x10 +#define CLOCK_DIV4 0x20 +#define CLOCK_STROBE 0x40 +#define PLL_WR_EN 0x02 + +/* PLL registers */ +#define PLL_MACRO_CNTL 0x01 +#define PLL_REF_DIV 0x02 +#define PLL_GEN_CNTL 0x03 +#define MCLK_FB_DIV 0x04 +#define PLL_VCLK_CNTL 0x05 +#define VCLK_POST_DIV 0x06 +#define VCLK0_FB_DIV 0x07 +#define VCLK1_FB_DIV 0x08 +#define VCLK2_FB_DIV 0x09 +#define VCLK3_FB_DIV 0x0A +#define PLL_XCLK_CNTL 0x0B +#define PLL_TEST_CTRL 0x0E +#define PLL_TEST_COUNT 0x0F + +/* Fields in PLL registers */ +#define PLL_PC_GAIN 0x07 +#define PLL_VC_GAIN 0x18 +#define PLL_DUTY_CYC 0xE0 +#define PLL_OVERRIDE 0x01 +#define PLL_MCLK_RST 0x02 +#define OSC_EN 0x04 +#define EXT_CLK_EN 0x08 +#define MCLK_SRC_SEL 0x70 +#define EXT_CLK_CNTL 0x80 +#define VCLK_SRC_SEL 0x03 +#define PLL_VCLK_RST 0x04 +#define VCLK_INVERT 0x08 +#define VCLK0_POST 0x03 +#define VCLK1_POST 0x0C +#define VCLK2_POST 0x30 +#define VCLK3_POST 0xC0 + +/* CONFIG_CNTL register constants */ +#define APERTURE_4M_ENABLE 1 +#define APERTURE_8M_ENABLE 2 +#define VGA_APERTURE_ENABLE 4 + +/* CONFIG_STAT0 register constants (GX, CX) */ +#define CFG_BUS_TYPE 0x00000007 +#define CFG_MEM_TYPE 0x00000038 +#define CFG_INIT_DAC_TYPE 0x00000e00 + +/* CONFIG_STAT0 register constants (CT, ET, VT) */ +#define CFG_MEM_TYPE_xT 0x00000007 + +#define ISA 0 +#define EISA 1 +#define LOCAL_BUS 6 +#define PCI 7 + +/* Memory types for GX, CX */ +#define DRAMx4 0 +#define VRAMx16 1 +#define VRAMx16ssr 2 +#define DRAMx16 3 +#define GraphicsDRAMx16 4 +#define EnhancedVRAMx16 5 +#define EnhancedVRAMx16ssr 6 + +/* Memory types for CT, ET, VT, GT */ +#define DRAM 0 +#define EDO_DRAM 1 +#define PSEUDO_EDO 2 +#define SDRAM 3 + +#define DAC_INTERNAL 0x00 +#define DAC_IBMRGB514 0x01 +#define DAC_ATI68875 0x02 +#define DAC_TVP3026_A 0x72 +#define DAC_BT476 0x03 +#define DAC_BT481 0x04 +#define DAC_ATT20C491 0x14 +#define DAC_SC15026 0x24 +#define DAC_MU9C1880 0x34 +#define DAC_IMSG174 0x44 +#define DAC_ATI68860_B 0x05 +#define DAC_ATI68860_C 0x15 +#define DAC_TVP3026_B 0x75 +#define DAC_STG1700 0x06 +#define DAC_ATT498 0x16 +#define DAC_STG1702 0x07 +#define DAC_SC15021 0x17 +#define DAC_ATT21C498 0x27 +#define DAC_STG1703 0x37 +#define DAC_CH8398 0x47 +#define DAC_ATT20C408 0x57 + +#define CLK_ATI18818_0 0 +#define CLK_ATI18818_1 1 +#define CLK_STG1703 2 +#define CLK_CH8398 3 +#define CLK_INTERNAL 4 +#define CLK_ATT20C408 5 +#define CLK_IBMRGB514 6 + +/* MEM_CNTL register constants */ +#define MEM_SIZE_ALIAS 0x00000007 +#define MEM_SIZE_512K 0x00000000 +#define MEM_SIZE_1M 0x00000001 +#define MEM_SIZE_2M 0x00000002 +#define MEM_SIZE_4M 0x00000003 +#define MEM_SIZE_6M 0x00000004 +#define MEM_SIZE_8M 0x00000005 +#define MEM_SIZE_ALIAS_GTB 0x0000000F +#define MEM_SIZE_2M_GTB 0x00000003 +#define MEM_SIZE_4M_GTB 0x00000007 +#define MEM_SIZE_6M_GTB 0x00000009 +#define MEM_SIZE_8M_GTB 0x0000000B +#define MEM_BNDRY 0x00030000 +#define MEM_BNDRY_0K 0x00000000 +#define MEM_BNDRY_256K 0x00010000 +#define MEM_BNDRY_512K 0x00020000 +#define MEM_BNDRY_1M 0x00030000 +#define MEM_BNDRY_EN 0x00040000 + +/* ATI PCI constants */ +#define PCI_ATI_VENDOR_ID 0x1002 +#define PCI_MACH64_GX 0x4758 +#define PCI_MACH64_CX 0x4358 +#define PCI_MACH64_CT 0x4354 +#define PCI_MACH64_ET 0x4554 +#define PCI_MACH64_VT 0x5654 +#define PCI_MACH64_GT 0x4754 + +/* CONFIG_CHIP_ID register constants */ +#define CFG_CHIP_TYPE 0x0000FFFF +#define CFG_CHIP_CLASS 0x00FF0000 +#define CFG_CHIP_REV 0xFF000000 +#define CFG_CHIP_VERSION 0x07000000 +#define CFG_CHIP_FOUNDRY 0x38000000 +#define CFG_CHIP_REVISION 0xC0000000 + +/* Chip IDs read from CONFIG_CHIP_ID */ +#define MACH64_GX_ID 0xD7 +#define MACH64_CX_ID 0x57 +#define MACH64_CT_ID 0x4354 +#define MACH64_ET_ID 0x4554 +#define MACH64_VT_ID 0x5654 +#define MACH64_GT_ID 0x4754 + +/* Mach64 chip types */ +#define MACH64_UNKNOWN 0 +#define MACH64_GX 1 +#define MACH64_CX 2 +#define MACH64_CT 3 +#define MACH64_ET 4 +#define MACH64_VT 5 +#define MACH64_GT 6 + +/* DST_CNTL register constants */ +#define DST_X_RIGHT_TO_LEFT 0 +#define DST_X_LEFT_TO_RIGHT 1 +#define DST_Y_BOTTOM_TO_TOP 0 +#define DST_Y_TOP_TO_BOTTOM 2 +#define DST_X_MAJOR 0 +#define DST_Y_MAJOR 4 +#define DST_X_TILE 8 +#define DST_Y_TILE 0x10 +#define DST_LAST_PEL 0x20 +#define DST_POLYGON_ENABLE 0x40 +#define DST_24_ROTATION_ENABLE 0x80 + +/* SRC_CNTL register constants */ +#define SRC_PATTERN_ENABLE 1 +#define SRC_ROTATION_ENABLE 2 +#define SRC_LINEAR_ENABLE 4 +#define SRC_BYTE_ALIGN 8 +#define SRC_LINE_X_RIGHT_TO_LEFT 0 +#define SRC_LINE_X_LEFT_TO_RIGHT 0x10 + +/* HOST_CNTL register constants */ +#define HOST_BYTE_ALIGN 1 + +/* GUI_TRAJ_CNTL register constants */ +#define PAT_MONO_8x8_ENABLE 0x01000000 +#define PAT_CLR_4x2_ENABLE 0x02000000 +#define PAT_CLR_8x1_ENABLE 0x04000000 + +/* DP_CHAIN_MASK register constants */ +#define DP_CHAIN_4BPP 0x8888 +#define DP_CHAIN_7BPP 0xD2D2 +#define DP_CHAIN_8BPP 0x8080 +#define DP_CHAIN_8BPP_RGB 0x9292 +#define DP_CHAIN_15BPP 0x4210 +#define DP_CHAIN_16BPP 0x8410 +#define DP_CHAIN_24BPP 0x8080 +#define DP_CHAIN_32BPP 0x8080 + +/* DP_PIX_WIDTH register constants */ +#define DST_1BPP 0 +#define DST_4BPP 1 +#define DST_8BPP 2 +#define DST_15BPP 3 +#define DST_16BPP 4 +#define DST_32BPP 6 +#define SRC_1BPP 0 +#define SRC_4BPP 0x100 +#define SRC_8BPP 0x200 +#define SRC_15BPP 0x300 +#define SRC_16BPP 0x400 +#define SRC_32BPP 0x600 +#define HOST_1BPP 0 +#define HOST_4BPP 0x10000 +#define HOST_8BPP 0x20000 +#define HOST_15BPP 0x30000 +#define HOST_16BPP 0x40000 +#define HOST_32BPP 0x60000 +#define BYTE_ORDER_MSB_TO_LSB 0 +#define BYTE_ORDER_LSB_TO_MSB 0x1000000 + +/* DP_MIX register constants */ +#define BKGD_MIX_NOT_D 0 +#define BKGD_MIX_ZERO 1 +#define BKGD_MIX_ONE 2 +#define BKGD_MIX_D 3 +#define BKGD_MIX_NOT_S 4 +#define BKGD_MIX_D_XOR_S 5 +#define BKGD_MIX_NOT_D_XOR_S 6 +#define BKGD_MIX_S 7 +#define BKGD_MIX_NOT_D_OR_NOT_S 8 +#define BKGD_MIX_D_OR_NOT_S 9 +#define BKGD_MIX_NOT_D_OR_S 10 +#define BKGD_MIX_D_OR_S 11 +#define BKGD_MIX_D_AND_S 12 +#define BKGD_MIX_NOT_D_AND_S 13 +#define BKGD_MIX_D_AND_NOT_S 14 +#define BKGD_MIX_NOT_D_AND_NOT_S 15 +#define BKGD_MIX_D_PLUS_S_DIV2 0x17 +#define FRGD_MIX_NOT_D 0 +#define FRGD_MIX_ZERO 0x10000 +#define FRGD_MIX_ONE 0x20000 +#define FRGD_MIX_D 0x30000 +#define FRGD_MIX_NOT_S 0x40000 +#define FRGD_MIX_D_XOR_S 0x50000 +#define FRGD_MIX_NOT_D_XOR_S 0x60000 +#define FRGD_MIX_S 0x70000 +#define FRGD_MIX_NOT_D_OR_NOT_S 0x80000 +#define FRGD_MIX_D_OR_NOT_S 0x90000 +#define FRGD_MIX_NOT_D_OR_S 0xa0000 +#define FRGD_MIX_D_OR_S 0xb0000 +#define FRGD_MIX_D_AND_S 0xc0000 +#define FRGD_MIX_NOT_D_AND_S 0xd0000 +#define FRGD_MIX_D_AND_NOT_S 0xe0000 +#define FRGD_MIX_NOT_D_AND_NOT_S 0xf0000 +#define FRGD_MIX_D_PLUS_S_DIV2 0x170000 + +/* DP_SRC register constants */ +#define BKGD_SRC_BKGD_CLR 0 +#define BKGD_SRC_FRGD_CLR 1 +#define BKGD_SRC_HOST 2 +#define BKGD_SRC_BLIT 3 +#define BKGD_SRC_PATTERN 4 +#define FRGD_SRC_BKGD_CLR 0 +#define FRGD_SRC_FRGD_CLR 0x100 +#define FRGD_SRC_HOST 0x200 +#define FRGD_SRC_BLIT 0x300 +#define FRGD_SRC_PATTERN 0x400 +#define MONO_SRC_ONE 0 +#define MONO_SRC_PATTERN 0x10000 +#define MONO_SRC_HOST 0x20000 +#define MONO_SRC_BLIT 0x30000 + +/* CLR_CMP_CNTL register constants */ +#define COMPARE_FALSE 0 +#define COMPARE_TRUE 1 +#define COMPARE_NOT_EQUAL 4 +#define COMPARE_EQUAL 5 +#define COMPARE_DESTINATION 0 +#define COMPARE_SOURCE 0x1000000 + +/* FIFO_STAT register constants */ +#define FIFO_ERR 0x80000000 + +/* CONTEXT_LOAD_CNTL constants */ +#define CONTEXT_NO_LOAD 0 +#define CONTEXT_LOAD 0x10000 +#define CONTEXT_LOAD_AND_DO_FILL 0x20000 +#define CONTEXT_LOAD_AND_DO_LINE 0x30000 +#define CONTEXT_EXECUTE 0 +#define CONTEXT_CMD_DISABLE 0x80000000 + +/* GUI_STAT register constants */ +#define ENGINE_IDLE 0 +#define ENGINE_BUSY 1 +#define SCISSOR_LEFT_FLAG 0x10 +#define SCISSOR_RIGHT_FLAG 0x20 +#define SCISSOR_TOP_FLAG 0x40 +#define SCISSOR_BOTTOM_FLAG 0x80 + +/* ATI VGA Extended Regsiters */ +#define sioATIEXT 0x1ce +#define bioATIEXT 0x3ce +extern unsigned ATIExtReg; +#define ATI2E 0xae +#define ATI32 0xb2 +#define ATI36 0xb6 + +/* VGA Graphics Controller Registers */ +#define VGAGRA 0x3ce +#define GRA06 0x06 + +/* VGA Seququencer Registers */ +#define VGASEQ 0x3c4 +#define SEQ02 0x02 +#define SEQ04 0x04 + +#define MACH64_MAX_X ENGINE_MAX_X +#define MACH64_MAX_Y ENGINE_MAX_Y + +#define INC_X 0x0020 +#define INC_Y 0x0080 + +#define RGB16_555 0x0000 +#define RGB16_565 0x0040 +#define RGB16_655 0x0080 +#define RGB16_664 0x00c0 + +#define POLY_TEXT_TYPE 0x0001 +#define IMAGE_TEXT_TYPE 0x0002 +#define TEXT_TYPE_8_BIT 0x0004 +#define TEXT_TYPE_16_BIT 0x0008 +#define POLY_TEXT_TYPE_8 (POLY_TEXT_TYPE | TEXT_TYPE_8_BIT) +#define IMAGE_TEXT_TYPE_8 (IMAGE_TEXT_TYPE | TEXT_TYPE_8_BIT) +#define POLY_TEXT_TYPE_16 (POLY_TEXT_TYPE | TEXT_TYPE_16_BIT) +#define IMAGE_TEXT_TYPE_16 (IMAGE_TEXT_TYPE | TEXT_TYPE_16_BIT) + +#define MACH64_NUM_CLOCKS 16 +#define MACH64_NUM_FREQS 50 + +/*============================================================================*/ + +typedef struct +{ + unsigned char h_disp; + unsigned char dacmask; + unsigned char ram_req; + unsigned char max_dot_clock; + unsigned char color_depth; +} +mach64FreqRec; + +typedef struct +{ + unsigned char r, g, b; +} +LUTENTRY; + +typedef struct +{ + unsigned long h_total_disp, h_sync_strt_wid; + unsigned long v_total_disp, v_sync_strt_wid; + unsigned long crtc_gen_cntl; + unsigned long color_depth; + unsigned long clock_cntl; + unsigned long dot_clock; + unsigned long fifo_v1; +} +mach64CRTCRegRec, * mach64CRTCRegPtr; + + +/* Wait until "v" queue entries are free */ +#define WaitQueue(v) \ +{ \ + int __cntr = 0; \ + while((regr(FIFO_STAT) & 0xFFFF) > ((unsigned short)(0x8000 >> (v)))) \ + { \ + if(__cntr++ > 500000) \ + { \ + Eprint(" Timeout Waiting for FIFO. \n"); \ + } \ + } \ +} + +/* Wait until GP is idle and queue is empty */ +#define WaitIdleEmpty() \ +{ \ + int __cntr = 0; \ + WaitQueue(16); \ + while ((regr(GUI_STAT) & 1) != 0) \ + { \ + if(__cntr++ > 500000) \ + { \ + Eprint(" Timeout Waiting for BLT engine. \n"); \ + } \ + } \ +} + +#define SKIP_2(_v) ((((_v)<<1)&0xFFF8)|((_v)&0x3)|(((_v)&0x80)>>5)) + +#define MACH64_BIT_BLT(_srcx, _srcy, _dstx, _dsty, _w, _h, _dir) \ +{ \ + WaitQueue(5); \ + regw(SRC_Y_X, (((_srcx) << 16) | ((_srcy) & 0x0000FFFF))); \ + regw(SRC_WIDTH1, (_w)); \ + regw(DST_CNTL, (_dir)); \ + regw(DST_Y_X, (((_dstx) << 16) | ((_dsty) & 0x0000FFFF))); \ + regw(DST_HEIGHT_WIDTH, (((_w) << 16) | ((_h) & 0x0000FFFF))); \ +} + +#ifndef NULL +#define NULL 0 +#endif + +/*============================================================================*/ +/* RCS-ID */ + +#define MACH64REGS_H_ID \ + "@(#) Linux-m68k: 1997 11 21 17:00:18 BHA: mach64regs.h " + +/* ^^^ */ +/* Please update this & put your initials here on every modification. */ +/* It can be checked with ' strings vmlinux | grep "@(#) " ' */ +/*============================================================================*/ + +#endif /* MACH64REGS_H */ --- m68k-2.1.79/drivers/video/fbcon-cfb16.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-cfb16.h Tue Jan 13 23:32:50 1998 @@ -2,8 +2,6 @@ * 16 bpp packed pixel (cfb16) */ - - extern struct display_switch fbcon_cfb16; extern u16 fbcon_cfb16_cmap[16]; extern void fbcon_cfb16_setup(struct display *p); --- m68k-2.1.79/drivers/video/fbcon-cfb2.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-cfb2.h Tue Jan 13 23:33:06 1998 @@ -2,8 +2,6 @@ * 2 bpp packed pixel (cfb2) */ - - extern struct display_switch fbcon_cfb2; extern void fbcon_cfb2_setup(struct display *p); extern void fbcon_cfb2_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/fbcon-cfb32.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-cfb32.h Tue Jan 13 23:33:15 1998 @@ -2,8 +2,6 @@ * 32 bpp packed pixel (cfb32) */ - - extern struct display_switch fbcon_cfb32; extern u32 fbcon_cfb32_cmap[16]; extern void fbcon_cfb32_setup(struct display *p); --- m68k-2.1.79/drivers/video/fbcon-cfb4.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-cfb4.h Tue Jan 13 23:33:25 1998 @@ -2,8 +2,6 @@ * 4 bpp packed pixel (cfb4) */ - - extern struct display_switch fbcon_cfb4; extern void fbcon_cfb4_setup(struct display *p); extern void fbcon_cfb4_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/fbcon-cfb8.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-cfb8.h Tue Jan 13 23:33:35 1998 @@ -2,8 +2,6 @@ * 8 bpp packed pixel (cfb8) */ - - extern struct display_switch fbcon_cfb8; extern void fbcon_cfb8_setup(struct display *p); extern void fbcon_cfb8_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/fbcon-ilbm.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-ilbm.h Tue Jan 13 23:33:49 1998 @@ -2,8 +2,6 @@ * Amiga interleaved bitplanes (ilbm) */ - - extern struct display_switch fbcon_ilbm; extern void fbcon_ilbm_setup(struct display *p); extern void fbcon_ilbm_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/fbcon-iplan2p2.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-iplan2p2.h Tue Jan 13 23:34:01 1998 @@ -2,8 +2,6 @@ * Atari interleaved bitplanes (2 planes) (iplan2p2) */ - - extern struct display_switch fbcon_iplan2p2; extern void fbcon_iplan2p2_setup(struct display *p); extern void fbcon_iplan2p2_bmove(struct display *p, int sy, int sx, int dy, --- m68k-2.1.79/drivers/video/fbcon-iplan2p4.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-iplan2p4.h Tue Jan 13 23:34:09 1998 @@ -2,8 +2,6 @@ * Atari interleaved bitplanes (4 planes) (iplan2p4) */ - - extern struct display_switch fbcon_iplan2p4; extern void fbcon_iplan2p4_setup(struct display *p); extern void fbcon_iplan2p4_bmove(struct display *p, int sy, int sx, int dy, --- m68k-2.1.79/drivers/video/fbcon-iplan2p8.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-iplan2p8.h Tue Jan 13 23:34:17 1998 @@ -2,8 +2,6 @@ * Atari interleaved bitplanes (8 planes) (iplan2p8) */ - - extern struct display_switch fbcon_iplan2p8; extern void fbcon_iplan2p8_setup(struct display *p); extern void fbcon_iplan2p8_bmove(struct display *p, int sy, int sx, int dy, --- m68k-2.1.79/drivers/video/fbcon-mac.h.orig Tue Jan 13 19:11:42 1998 +++ m68k-2.1.79/drivers/video/fbcon-mac.h Tue Jan 13 23:34:29 1998 @@ -2,8 +2,6 @@ * Mac variable bpp packed pixels (mac) */ - - extern struct display_switch fbcon_mac; extern void fbcon_mac_setup(struct display *p); extern void fbcon_mac_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/fbcon-mfb.h.orig Tue Jan 13 19:11:43 1998 +++ m68k-2.1.79/drivers/video/fbcon-mfb.h Tue Jan 13 23:34:38 1998 @@ -2,8 +2,6 @@ * Monochrome (mfb) */ - - extern struct display_switch fbcon_mfb; extern void fbcon_mfb_setup(struct display *p); extern void fbcon_mfb_bmove(struct display *p, int sy, int sx, int dy, int dx, --- m68k-2.1.79/drivers/video/virgefb.c.orig Tue Jan 13 23:42:55 1998 +++ m68k-2.1.79/drivers/video/virgefb.c Tue Jan 13 23:43:48 1998 @@ -35,6 +35,7 @@ #include #include "s3blit.h" +#include "fbcon.h" #include "fbcon-cfb8.h" #include "fbcon-cfb16.h" @@ -467,7 +468,7 @@ var->height = -1; var->width = -1; - var->accel = FB_ACCEL_CYBERVISION3D; + var->accel = FB_ACCEL_S3VIRGE; DPRINTK("accel CV64/3D\n"); var->vmode = FB_VMODE_NONINTERLACED; Greetings, Geert -- Geert Uytterhoeven Geert.Uytterhoeven@cs.kuleuven.ac.be Wavelets, Linux/{m68k~Amiga,PPC~CHRP} http://www.cs.kuleuven.ac.be/~geert/ Department of Computer Science -- Katholieke Universiteit Leuven -- Belgium