Open Design Prototype Board

The site is under construction


All electronics designers, students and researchers are always trying to test their ideas and check its performance before punishing it. Several kinds of test prototype boards are used for this purpose. Usually these boards are either very expensive and has either more or less features than what the designer need. For this reason the idea of designing a simple and open design board is going to be available for anyone for almost nothing and he/she can customize it for his/her specific needs. The design of this board is intended to be an open design and to use free and open design tools in order to make it available to large number of designers around the world.


This project is intended to:

Design License

This project is going to be a free hardware design. It uses GNU license style for hardware. As a result this project is going to use the OpenIPCore license. You can check the draft copy of this license at OpenIPCore License page

Design Flow

This project can be divided into two parts. The board design and the cores design.
Of course, anyone can use the commercial tools to design and implement this project, but my objective is to build it using only free tools "GNU and non-GNU". so in this article I'll describe only the Free "hopefully Open" design flow.

Board design
The board design flow can be done through four steps: Cores design
Design Flow

Testing and Debugging the designn
One of the most important factors in hardware design is the testing and debugging of the design's physical implementation. Scopes, logic analayzers and DMMs are the most important devices that are used to debug hardware. In our project we are using the free approach, so we have to keep using this approach even in the debugging hardware.
Xscope is a PC based open-design scope. The whole design -including documentation, schematics, layout and the software are available from the xscope site.
Since the Xscope software is available, DMM can be easly implemented by enhancing the software and adding small circuits to measure the current and the impedance.
Logic analayzer can be implemented by the designing a small core for the CPLD and download it to the board itself.

System Description

Board block diagram
The system is composed of 6 main blocs:

CPLD Pin assignment

Clocks IO pinsGlobal ResetGSR pin is connected to a reset source select circuit. This circuit selects the reset either from the the external interface line, PC parallel port line or on board push button switch.This circuit is a hard wired circuit and can be implemented by jumper select. Note: the real pin mapping (i.e. pin to pin ) is going to be determined later.

Schematic Design

gschem symbols

Board Mechanical Design


Layout Design


Bill Of Materials

Component selection guide

Contact us:

You can send your comments to:
You can also send your comments to Jamil Khatib.

References tools and links