Project
Name: LCD Driver
Description:
LCD Driver that we want to designed is a CMOS LCD driver capable of
driving a multiplexed display of up to 128 segments ( 16 columns by 8 backplanes
). The number of backplanes being driven is programmable from one to eight.
Data to be displayed is sent to the chip serially and stored in an internal
RAM. An external resistor and capasitor control the frequency of the driving
signals to the LCD. The displayed data may also be read serially from the
on-chip RAM.
Specifications:
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Operates on 22-bits (five bits first is address, the next bit is read and
write flags, and 16 bits data )
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Can be programmed to accept oscillator output
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Can be programmed to backplane signals of another LCD Driver for cascading
purposes.
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Can driving a multiplexed display
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For backplane capacitance under 2000 pF LCD driver guarantees an offset
of less than 10 mV.
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Power supply of VDD is 5 V - 15 V.
Design Stages:
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Make core specifications
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Design the behavioral and structural VHDL using Alliance tools
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Implementation to symbolic layout
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Full verifications
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Converting to real layout
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Make full report
Current Stage:
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Make the behavioral and structural VHDL using Alliance tools
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To know a little bit about Alliance, click this
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You can download our work documentation (Alliance VHDL code) here.
Maintainers and Authors :
LCD Driver development team
current members:
Mailing-list: