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Introduction

The aim of this project is to develop and maintain OpenRISC 1000 architectural simulator.

Or1ksim is a generic OpenRISC 1000 architecture simulator capable of emulating OpenRISC based computer systems. Or1ksim provides several unique features:

• Free, open source code
• High level, fast, architecture simulation that allows early code analysis and system performance evaluation
• All major models of OpenCores peripheral and system controller cores supported
• Easy addition of new peripheral models
• Superior performance: 10 MIPS on standard PC (PIII@1GHz)
• Standalone mode or connected through a network socket to remote GNU Debugger (GDB)
• Support for different environments (memory configurations and sizes, OR1K processor model, configuration of peripheral devices)

Status

• or1ksim simulates 32-bit part of the OpenRISC 1000 architecture
• or1ksim support for 64-bit part of the OpenRISC is not yet available

Download

Source code for current development tarball of the OpenRISC or1ksim port is available from the OpenCores CVS under the module hierarchy or1k/or1ksim. You can also get it directly by using the CVSget.

At this point no binaries for the OpenRISC are available due to development status of the or1ksim. However building the or1ksim should be rather straightforward.

Installation

Regular or1ksim building is tested only under RedHat 7.0 GNU/Linux. The procedure to build and install the or1ksim is the following:

First step is optional - you need to have recent source directory ready. If you don't have them, get them from the OpenCores CVS. The checkout process might take a while.

cvs -d :pserver:cvs@cvs.opencores.org:/home/oc/cvs -z9 co -d or1ksim or1k/or1ksim

Now Build and install the simulator binary.

cd or1ksim
./configure --target=or32-rtems --prefix=/opt/or32-rtems &&
make all install
export PATH=/opt/or32-rtems/bin:$PATH

Documentation

No online documentation available at this time.

Wish List (TODO List)

This is what we would like to develop/see developed but presently nobody is working on these projects. If you want to help, send an email to the mailing list.

• Support for 64-bit part of OpenRISC 1000
• Speed optimizations
• Test or1ksim on non-Linux platforms (various UNIX and Cygwin)
• Write documentation
• Add additional models of OpenCores peripheral and system controllers

Past Contributor(s)

These are the people currently not working on the or1ksim, but have contributed in the past:

• Johan Rydberg, jrydberg@opencores.org_NOSPAM
• Jimmy Chen-Min Chen, jimmy@opencores.org_NOSPAM
• Chris Ziomkowski, chris@opencores.org_NOSPAM

Developer(s)

The team working on or1ksim:

• Erez Volk, erez@opencores.org_NOSPAM
• Marko Mlinar, markom@opencores.org_NOSPAM
• Simon Srot, simons@opencores.org_NOSPAM
• Damjan Lampret, lampret@opencores.org_NOSPAM

Mailing list / Discussion Forum

To participate in the development or simply to discuss or1ksim issues and to report bugs, go to the openrisc mailing list. To subscribe to the list, follow mailing list subscribe instructions.

Page Maintainer(s)

This web page is maintained by Marko Mlinar and Damjan Lampret.