head	1.2;
access;
symbols
	mkfiles_rev1:1.1.0.2;
locks; strict;
comment	@# @;


1.2
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1.1
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1.1.2.1
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desc
@@


1.2
log
@merged mkfiles_rev1 branch to the mainline
@
text
@#===================================================================
# File:        Makefile
# Author:      David Burnette 
# Created:     July 5, 2007
# 
# Description: 
#  Makefile to build the System09 by John Kent
# 
#  This makefile will build John Kent's entire System09 project 
#  (RTL synthesis and monitor ROMs) and even download the final 
#  bitstream to the prototype board.
# 
#  You can use Xilinx ISE interactively to add new RTL source files
#  to this project.
#
# Usage:
#  Use 'make help' to get a list of options.
#
# Dependencies:
#  Depends on makefile fragments in the 'MKFRAGS' directory.
#
# Revision History:
#   dgb  2007-07-05  Original version
#
#   dgb  2008-04-07  Split out files into fragments. Modified
#                    ROM source generation to be per src directory.
#
#===================================================================

MKFRAGS := ../../mkfiles
export MKFRAGS

#===================================================================
# User-modifiable variables
#
# This name must match the name of the design in Xilinx ISE (case
# sensitive). 
DESIGN_NAME := my_system09
#
# Constraint file (unfortunately it cannot be extracted from ISE)
UCF_FILE    := XSA-3S1000.ucf
#
# Technology family (unfortunately it cannot be extracted from ISE)
FAMILY      := spartan3

# List of ROM VHDL files
.PHONY: roms
roms:
	@@$(MAKE) -C ../../src/sys09bug sys09xes.vhd
	@@$(MAKE) -C ../../src/Flex9 flex9ide.vhd

#===================================================================
# You should not need to edit anything below this line

# XESS Tools
XSLOAD     := C:/Progra~1/XSTOOLs/xsload.exe

include ../../mkfiles/xilinx_rules.mk

#===================================================================
# TARGETS

.PHONY: all
all: bit 

.PHONY: bit
bit: roms $(DESIGN_NAME).bit

.PHONY: impact
impact: roms bit do_impact

prom: roms $(DESIGN_NAME).mcs

.PHONY: xsload
xsload: roms $(DESIGN_NAME).bit
	@@$(ECHO)
	@@$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (parallel) ="
	$(XSLOAD) -p 0 -b xsa-3s1000 -fpga $<

usbxsload.bit: roms $(DESIGN_NAME).bit
	@@$(ECHO)
	@@$(ECHO) "======= Generating special bitstream with StartUpClk=JtagClk ========"
	$(GREP) -v StartUpClk $(BITGEN_OPTIONS_FILE) >tmp.ut
	$(ECHO) "-g StartUpClk:JtagClk" >>tmp.ut
	$(BITGEN) $(BITGEN_FLAGS) -f tmp.ut $(DESIGN_NAME).ncd usbxsload.bit

.PHONY: usbxsload
usbxsload: roms usbxsload.bit
	@@$(ECHO)
	@@$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (USB) ======"
	$(XSLOAD) -usb 0 -b xsa-3s1000 -fpga usbxsload.bit

.PHONY: usbflash0
usbflash0: roms prom $(DESIGN_NAME).bit
	$(XSLOAD) -usb 0 -b xsa-3s1000 -flash $(DESIGN_NAME).mcs
	
.PHONY: help
help:
	@@$(ECHO) "Use this Makefile to regenerate the entire System09 bitstream"
	@@$(ECHO) "after modifying any of the source RTL or 6809 assembler code."
	@@$(ECHO) ""
	@@$(ECHO) "This makefile uses the following project files from the Xilinx ISE"
	@@$(ECHO) "   $(XST_FILE)"
	@@$(ECHO) ""
	@@$(ECHO) "You use Xilinx ISE interactively to add new RTL source files."
	@@$(ECHO) ""
	@@$(ECHO) "            Availiable targets"
	@@$(ECHO) 
	@@$(ECHO) "  For building all or part of the system:"
	@@$(ECHO) "    roms      - Run asm09 and then generate the VHDL RTL rom files"
	@@$(ECHO) "    bit       - Rebuild the entire system and generate the bitstream file"
	@@$(ECHO) "    all       - Rebuild everything"
	@@$(ECHO) "    prom      - Rebuild the entire system and generate an MCS prom file"
	@@$(ECHO) "    exo       - Rebuild the entire system and generate an EXO prom file"
	@@$(ECHO) 
	@@$(ECHO) "  For downloading the bitstream to the board:"
	@@$(ECHO) "    xsload    - Download the bitstream to the FPGA via XSLOAD"
	@@$(ECHO) "    usbxsload - Download the bitstream to the FPGA via usbXSLOAD"
	@@$(ECHO) "    usbflash0 - Download the bitstream Flash slot 0 via usbXSLOAD"
	@@$(ECHO) "    impact    - Download the bitstream to the FPGA via iMPACT"
	@@$(ECHO) 
	@@$(ECHO) "  For project maintenance:"
	@@$(ECHO) "    help      - Print this help text"
	@@$(ECHO) "    clean     - Clean up the ISE files"
	@@$(ECHO) ""

.PHONY: clean
clean:
	-$(MAKE) -C ../../src/sys09bug clean
	-$(MAKE) -C ../../src/Flex9 clean
	-$(RM) *.ncd *.ngc *.ngd *.twr *.bit *.mcs *.stx *.ucf.untf *.mrp 
	-$(RM) *.ncl *.ngm *.prm *_pad.txt *.twx *.log *.syr *.par *.exo *.xpi
	-$(RM) *.cmd_log *.ngr *.bld *_summary.html *.nc1 *.pcf *.bgn
	-$(RM) *.pad *.placed_ncd_tracker *.routed_ncd_tracker *_pad.csv *.drc
	-$(RM) *.pad_txt $(DESIGN_NAME)_impact.cmd *.unroutes
	-$(RMDIR) _ngo _xmsgs

@


1.1
log
@file Makefile was initially added on branch mkfiles_rev1.
@
text
@d1 137
@


1.1.2.1
log
@Overlay makefiles. Renamed some 6809 assembler source files from
.txt to .asm (and updated the shell scripts).
Fixed xess .UCF file to work with ISE 9.2i.
Added missing sdram VHD files for Xess board.
All work is on the mkfiles_rev1 branch.
@
text
@a0 150
#===================================================================
# File:        Makefile
# Author:      David Burnette 
# Created:     July 5, 2007
# 
# Description: 
#  Makefile to build the System09 by John Kent
# 
#  This makefile will build John Kent's entire System09 project 
#  (RTL synthesis and monitor ROMs) and even download the final 
#  bitstream to the prototype board.
# 
#  You can use Xilinx ISE interactively to add new RTL source files
#  to this project.
#
# Usage:
#  Use 'make help' to get a list of options.
#
# Dependencies:
#  Depends on makefile fragments in the 'MKFRAGS' directory.
#
# Revision History:
#   dgb  2007-07-05  Original version
#
#   dgb  2008-04-07  Split out files into fragments. Modified
#                    ROM source generation to be per src directory.
#
#===================================================================

MKFRAGS := ../../mkfiles
export MKFRAGS

#===================================================================
# User-modifiable variables
#
# This name must match the name of the design in Xilinx ISE (case
# sensitive). 
DESIGN_NAME := my_system09
#
# Constraint file (unfortunately it cannot be extracted from ISE)
UCF_FILE    := XSA-3S1000.ucf
#
# Technology family (unfortunately it cannot be extracted from ISE)
FAMILY      := spartan3

# List of ROM VHDL files
roms:
	@@$(MAKE) -C ../../src/sys09bug sys09xes.vhd
	@@$(MAKE) -C ../../src/Flex9 flex9ide.vhd


#===================================================================
# You should not need to edit anything below this line

# XESS Tools
XSLOAD     := C:/Progra~1/XSTOOLs/xsload.exe

include ../../mkfiles/xilinx_rules.mk

#===================================================================
# TARGETS

all: roms bit 

roms: $(ROMFILES)

debug_vars:
	@@$(ECHO) "XST_FILE    = '$(XST_FILE)'"
	@@$(ECHO) "PRJ_FILE    = '$(PRJ_FILE)'"
	@@$(ECHO) "HDL_FILES   = '$(HDL_FILES)'"
	@@$(ECHO) "PART        = '$(PART)'"
	@@$(ECHO) "DEVICE      = '$(DEVICE)'"
	@@$(ECHO) "SPEED       = '$(SPEED)'"
	@@$(ECHO) "PACKAGE     = '$(PACKAGE)'"
	@@$(ECHO) "UCF_FILE    = '$(UCF_FILE)'"
	@@$(ECHO) "BSD_FILE    = '$(BSD_FILE)'"

bit: roms $(DESIGN_NAME).bit

prom: $(DESIGN_NAME).mcs

xsload: $(DESIGN_NAME).bit
	@@$(ECHO)
	@@$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (parallel) ="
	$(XSLOAD) -p 0 -b xsa-3s1000 -fpga $<

usbxsload.bit: $(DESIGN_NAME).bit
	@@$(ECHO)
	@@$(ECHO) "======= Generating special bitstream with StartUpClk=JtagClk ========"
	$(GREP) -v StartUpClk $(BITGEN_OPTIONS_FILE) >tmp.ut
	$(ECHO) "-g StartUpClk:JtagClk" >>tmp.ut
	$(BITGEN) $(BITGEN_FLAGS) -f tmp.ut $(DESIGN_NAME).ncd usbxsload.bit

usbxsload: usbxsload.bit
	@@$(ECHO)
	@@$(ECHO) "======= Downloading bitstream to XSA-3S1000 using XSLOAD (USB) ======"
	$(XSLOAD) -usb 0 -b xsa-3s1000 -fpga usbxsload.bit

impact: $(DESIGN_NAME).bit
	@@$(ECHO)
	@@$(ECHO) "======= Downloading bitstream to XSA-3S1000 using Impact ============"
	-@@$(RM) $(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "setMode -bscan" >>$(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "setCable -p auto" >>$(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "addDevice -p 1 -file $(BSD_FILE)" >>$(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "assignFile -p 1 -file $<" >>$(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "program -p 1" >>$(DESIGN_NAME)_impact.cmd
	@@$(ECHO) "quit" >>$(DESIGN_NAME)_impact.cmd
	$(IMPACT) -batch $(DESIGN_NAME)_impact.cmd

.PHONY: help
help:
	@@$(ECHO) "Use this Makefile to regenerate the entire System09 bitstream"
	@@$(ECHO) "after modifying any of the source RTL or 6809 assembler code."
	@@$(ECHO) ""
	@@$(ECHO) "This makefile uses the following project files from the Xilinx ISE"
	@@$(ECHO) "   $(XST_FILE)"
	@@$(ECHO) ""
	@@$(ECHO) "You use Xilinx ISE interactively to add new RTL source files."
	@@$(ECHO) ""
	@@$(ECHO) "            Availiable targets"
	@@$(ECHO) 
	@@$(ECHO) "  For building all or part of the system:"
	@@$(ECHO) "    roms      - Run asm09 and then generate the VHDL RTL rom files"
	@@$(ECHO) "    bit       - Rebuild the entire system and generate the bitstream file"
	@@$(ECHO) "    all       - Rebuild everything"
	@@$(ECHO) "    prom      - Rebuild the entire system and generate an MCS prom file"
	@@$(ECHO) "    exo       - Rebuild the entire system and generate an EXO prom file"
	@@$(ECHO) 
	@@$(ECHO) "  For downloading the bitstream to the board:"
	@@$(ECHO) "    xsload    - Download the bitstream to the FPGA via XSLOAD"
	@@$(ECHO) "    usbxsload - Download the bitstream to the FPGA via XSLOAD"
	@@$(ECHO) "    impact    - Download the bitstream to the FPGA via iMPACT"
	@@$(ECHO) 
	@@$(ECHO) "  For project maintenance:"
	@@$(ECHO) "    help      - Print this help text"
	@@$(ECHO) "    clean     - Clean up the ISE files"
	@@$(ECHO) ""

.PHONY: clean
clean:
	-$(MAKE) -C ../../src/sys09bug clean
	-$(MAKE) -C ../../src/Flex9 clean
	-$(RM) *.ncd *.ngc *.ngd *.twr *.bit *.mcs *.stx *.ucf.untf *.mrp 
	-$(RM) *.ncl *.ngm *.prm *_pad.txt *.twx *.log *.syr *.par *.exo *.xpi
	-$(RM) *.cmd_log *.ngr *.bld *_summary.html *.nc1 *.pcf *.bgn
	-$(RM) *.pad *.placed_ncd_tracker *.routed_ncd_tracker *_pad.csv *.drc
	-$(RM) *.pad_txt $(DESIGN_NAME)_impact.cmd
	-$(RMDIR) _ngo _xmsgs

@


1.1.2.2
log
@Added creation of xilinx tmpdirs
@
text
@a76 2
	@@$(ECHO) "XSTHDPDIR    = '$(XSTHDPDIR)'"
	@@$(ECHO) "TMPDIR    = '$(TMPDIR)'"
@


1.1.2.3
log
@checkin
@
text
@d77 2
a78 2
	@@$(ECHO) "XSTHDPDIR   = '$(XSTHDPDIR)'"
	@@$(ECHO) "TMPDIR      = '$(TMPDIR)'"
d150 1
a150 1
	-$(RM) *.pad_txt $(DESIGN_NAME)_impact.cmd *.unroutes
@


1.1.2.4
log
@fixed impact dependency
@
text
@d101 1
a101 1
impact: bit
@


1.1.2.5
log
@fixed impact dependency
@
text
@d63 16
a78 1
all: bit 
a81 2
impact: bit do_impact

d101 11
@


1.1.2.6
log
@fixed impact dependency
@
text
@a62 1
.PHONY: all
a64 1
.PHONY: bit
a66 1
.PHONY: impact
a70 1
.PHONY: xsload
a82 1
.PHONY: usbxsload
d88 1
@


1.1.2.7
log
@more dependencies
@
text
@a46 1
.PHONY: roms
d51 1
d70 1
a70 1
impact: roms bit do_impact
d72 1
a72 1
prom: roms $(DESIGN_NAME).mcs
d75 1
a75 1
xsload: roms $(DESIGN_NAME).bit
d80 1
a80 1
usbxsload.bit: roms $(DESIGN_NAME).bit
d88 1
a88 1
usbxsload: roms usbxsload.bit
@


1.1.2.8
log
@Added download to flash slot 0
@
text
@a92 4
.PHONY: usbflash0
usbflash0: roms prom $(DESIGN_NAME).bit
	$(XSLOAD) -usb 0 -b xsa-3s1000 -flash $(DESIGN_NAME).mcs
	
d114 1
a114 2
	@@$(ECHO) "    usbxsload - Download the bitstream to the FPGA via usbXSLOAD"
	@@$(ECHO) "    usbflash0 - Download the bitstream Flash slot 0 via usbXSLOAD"
@