Re: [oc] MISCs and partially desinchronized networks

["Marko Mlinar" <Marko.Mlinar@campus.fri.uni-lj.si>]

> Marko,
>
> your "MISC Matrix" design is very interesting. Since you mention
> storing programs in the local memories, I will suppose that you are
> talking about a MIMD (multiple instructions, multiple data) design
> instead of a SIMD like early Connection Machines. If that is the case,
> then the lack of control instructions is strange.
I don't quite understand in which direction are you pointing, but these
MISC are intended to be SISD like RISCs, if I understand this abbreviations
correctly. I fear that you misunderstood my ideas.

> By the early 1990s we had made the network circuits smarter so that
> packets could flow through a node without interrrupting the calculation
> in that node (unless that happened to be the packet's destination).
> With this change, the network started to perform as if it had infinite
> dimensions (or, to be more exact, one dimension for each node) no
> matter how it was organized physically. So the simpler 2D and 3D meshes
> and toruses became popular. We became worried about scalable
> total bandwidth and limiting latency (see the Scalable Coherent
> Interface, SCI, for ideas about this - http://www.SCIzzL.com/).

> Your system is more like SCI, so you are on the right track as long as
> you can keep it simple.
I heard of these options before. I wanted to make a lot of simple processors
and simple protocols rather than small number of fast ones.
I think this processor tries to find maximum (overall) computation power per
mm2.
Only communication needed is communication between functions and accessing
memory units. Most of communication is done with direct neighbours and
FU0. Although this MISC matrix does calculate sequential programs much
slower than other ideas you mentioned.

Maybe it would be good idea to simulate this processor and find bottlenecks.

thanks for your help,
    Marko