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Re: [oc] Xilinx block-RAM async read
Dear Richard,
> Always use synchronous accesses for Xilinx and Altera memories. This
> effectively means a one-cycle write-access and a two-cycle read access for
> the memory.
That's exactly what I was trying to avoid. BTW Altera can do asyncronous
reads.
Thanks anyway, it seems that there's no other solution.
Andras
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