Re: [oc] complex division in Hardware

[kn@cetic.be]

Hi, 

I am trying to implement an HDL Module that performs a 16b/16b division 
and i can't find efficient algorith or strategy, when you write  
tmp00 = 1 / tmp00 , it is not staitforward, but how do you perform such 
an operation, of course it is not a simple shifter .
could you please tell how to perform it.

Kind regards


----- Original Message ----- 
From: Johan Klockars <rand@c... > 
To: cores@o...  
Date: Tue, 8 Jan 2002 11:50:51 +0100 
Subject: Re: [oc] complex division in Hardware 

> 
> 
> > I am implementing complex division in hardware. Is 
> > there any easy method to do that? 
> 
> Do you need this to be done in a single (very long) cycle, or is 
> multi-cycle operation OK? 
> 
> > As you know complex division can be done like this: 
> > a+bi      a+bi      c-di      (a+bi) * (c-di) 
> > ------ = ------- * ------- = -------------------- 
> > c+di      c+di      c-di          c^2 + d^2 
> 
> Equivalent to the following (unless I made some mistake): 
> tmp00 = c * c 
> tmp01 = d * d 
> tmp00 = tmp00 + tmp01 
> tmp00 = 1 / tmp00 
> tmp01 = a * c 
> tmp02 = b * d 
> tmp01 = tmp01 + tmp02 
> real = tmp01 * tmp00 
> tmp01 = a * d 
> tmp02 = b * c 
> tmp01 = tmp02 - tmp01 
> imag = tmp01 * tmp00 
> 
> Possibly the output registers could be reused as temporaries too. 
> 
> > But it takes lot of hardware if we directly implement 
> 
> Obviously, both the multiplications and the division can be 
> implemented 
> using an adder/subtractor if the capability to shift values is 
> added. 
> 
> That is, you can make do with a single adder/subtractor, a couple 
> of 
> registers, a couple of multiplexers and a state machine. 
> For better performance, add a multiplier, divider, extra 
> adder/subtractor, 
> etc. 
> 
> -- 
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>      of Technology      |  .signatures  |            
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>    Gothenburg, Sweden   |     well?     |            (fVDI, MGIFv5, 
> QLem) 
> 
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