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Re: [oc] FPGA size needed for projects ?



I believe you misunderstood me some. My suggestion was not that you or someone else should sit down and get numbers for me. My suggestion was that the 'template' used to briefly describe the projects have a line added for gate count. I assume that the original project maintainer have theese numbers from their synthesis and can easily add them on the next update. I belive is it just a matter of 'did not think of that' and if the line is in the 'template' the issue is automatically solved, for ongoing projects anyway.

--- Rudolf Usselmann <rudi@asics.ws> wrote:
>On Thursday 04 July 2002 02:06 am, Matts wrote:
>> I am new to this, so this might be a silly question, if so, Please tell
>> me why.
>>
>> I want to get started and are looking for a FPGA board to start testing
>> some projects on. But how many gates do I need ? Would in not be nice if
>> each project had this listed on the details section first page coming up
>> when clickin on a project in the project's page ?
>
>Many things "would be nice" !  It would be nice if I would get for each
>"how do I do ..." email reply $100 ! I would be a very rich man !  It would 
>also be nice if more people would help on existing projects to get the
>gate count numbers you want and help verify/debug the cores. But, as
>you already found out, most of us like to get a free lunch, but only few
>try to make a difference and give out free lunches.
>
>So here is a challenge for you: Synthesize each core on OpenCores
>web site for Xilinx and Altera FPGAs and then email those numbers
>to the authors of each core asking them to add that information to the
>web pages.
>
>Cheers,
>rudi
>
>
>
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