RE: [oc] i2c slave model

["Morris, Scott J" <morris.scott@pnl.gov>]

I have a form of a I2C slave in VHDL.  It's not in the polished state that
most of the opencore projects are in.  And what I have is a specific
implementation.  I'm using this I2C slave to act as a sentry or gate for
other I2C components.  You send the gate's address and the gate connects the
other I2C devices onto the SDA and SCL lines.  It disconnects the devices
once a stop signal is sent.  This allowed me to have several identical
boards, with I2C devices on them, that could be individually addressed.
I've implemented it in a XC9536 and have been able to communicate with it.
It hasn't been rigorously tested and probably won't be (at least not by me,
project was cut back).  But you are welcome to have a look.

Scott

> -----Original Message-----
> From: ckh827@hotmail.com [mailto:ckh827@hotmail.com]
> Sent: Tuesday, October 29, 2002 11:55 AM
> To: cores@opencores.org
> Subject: [oc] i2c slave model
> 
> 
> 
> 
> HI, I need a VHDL version of i2c slave model(not verilog).  Anybody
> know where I can find it?  I tried so hard to code it but has no
> progress.  Any help is appreciated.
> 
> 
> ken
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