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[cvs-checkins] uart16550/rtl/verilog uart_fifo.v uart_receive ...
CVSROOT: /home/oc/cvs
Module name: uart16550
Changes by: gorban 01/08/23 17:08:30
Modified files:
rtl/verilog : uart_fifo.v uart_receiver.v uart_regs.v
uart_top.v uart_transmitter.v uart_wb.v
Log message:
Changed top level with new port names + includes in all files.
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