[cvs-checkins] pci/bench/verilog pci_testbench_defines.v

[OpenCores CVS Agent <cvs-checkins-agent@opencores.org>]

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/08/22 15:56:28

Modified files:
	bench/verilog  : pci_testbench_defines.v 

Log message:
	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim
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