[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[cvs-checkins] pci/rtl/verilog pci_target32_sm.v

To: cvs-checkins@opencores.org
Subject: [cvs-checkins] pci/rtl/verilog pci_target32_sm.v
From: OpenCores CVS Agent <cvs@www.lampret.com>
Date: Tue, 24 Sep 2002 17:30:37 -0100
Sender: owner-cvs-checkins@opencores.org

CVSROOT:	/home/oc/cvs
Module name:	pci
Changes by:	mihad	02/09/24 17:30:36

Modified files:
	rtl/verilog    : pci_target32_sm.v 

Log message:
	Changed state machine encoding to true one-hot

--
To unsubscribe from cvs-checkins mailing list please visit http://www.opencores.org/mailinglists.shtml

Prev by Date: [cvs-checkins] ethernet/sim/rtl_sim/ncsim_sim/bin sim_file_li ...
Next by Date: [cvs-checkins] pci/rtl/verilog pci_target32_sm.v
Prev by thread: [cvs-checkins] usb1_funct/rtl/verilog usb1_ctrl.v usb1_define ...
Next by thread: [cvs-checkins] pci/rtl/verilog pci_target32_sm.v
Index(es):
- Date
- Thread