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[cvs-checkins] can/ ench/verilog/can_testbench.v ench/verilog ...
CVSROOT: /home/oc/cvs
Module name: can
Changes by: mohor 03/01/08 01:11:24
Modified files:
bench/verilog : can_testbench.v can_testbench_defines.v
rtl/verilog : can_bsp.v can_btl.v can_registers.v can_top.v
sim/rtl_sim/bin: rtl_file_list sim_file_list
sim/rtl_sim/run: wave.do
Added files:
rtl/verilog : can_crc.v can_fifo.v
Log message:
Acceptance filter added.
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