Re: [ethmac] Ethmac status

["Damjan Lampret" <lampret@opencores.org>]

Hi all,

ethernet mac core will definately be tested with or1200 risc cpu. But it
might take a while (let say a month) to do this. We plan to use the Xess
XSV800 FPGA board for this purpose. For this purpose we will also write a
simple ethernet device driver that others will be able to take as an example
how to write a device driver for this particular ethernet mac.

regards,
Damjan

----- Original Message -----
From: "Matthew Ettus" <matt@ettus.com>
To: <ethmac@opencores.org>
Sent: Wednesday, October 24, 2001 7:04 AM
Subject: [ethmac] Ethmac status


>
> I was hoping to find out what the status of the Ethmac core was.  Has
> anyone hooked one up to a PHY chip?  Attached it to something with the
> Wishbone bus?  Is it capable of full duplex?
>
> I'm in the process of designing a Software defined radio, and would like
> to use the Ethmac core for data transfer.
>
> Thanks for your help
>
> Matt
> N2MJI
> --
> To unsubscribe from ethmac mailing list please visit
http://www.opencores.org/mailinglists.shtml
>

--
To unsubscribe from ethmac mailing list please visit http://www.opencores.org/mailinglists.shtml