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RE: [ethmac] MAC frame memory
Thanks, Illan.
my problem is that ethernet MAC is part of a big system (all cores are
connected through the wishhbone bus). I don't have bus avaliable all the
time so I need some memory to hold few words to prevent underrun and
overrun.
At the end the whole design will be put into ASIC where wishbone bus will
run at high frequency and bus will be avaliable to Ethernet MAC almost
all the time. At this moment the design is implemented in FPGA and wishbone
is running at 25 MHz. Since there are also VGA, RISC, UART, etc. in the
design, I need some reserve to avoid underrun/overrun.
Regards,
Igor
> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of Illan Glasner
> Sent: 2. april 2002 20:26
> To: ethmac@opencores.org
> Subject: RE: [ethmac] MAC frame memory
>
>
>
> Hi,
>
> Obviusly there are many reason to make all kind of sizes of
> fifo but assuming you don;t plan on having a full packet stored
> than 5 nibble is enough to compensate for the PPM and even this
> inculde large margin.
>
> The PPM "effect" is about half nibble so if you start reading
> from the fifo when it have reach the middle you have 2 nibble
> margin in each side which is about 4 time the max requirment PPM.
>
> Since 5 nibble are only 20 FF you can save a memorey and use it
> for other place where you might need large memorey or any other
> use you might have or maybe even be able to use smaller device.
>
> have a nice day
>
> Illan
>
>
> -----Original Message-----
> From: Igor Mohor [mailto:igorm@opencores.org]
> Sent: Monday, April 01, 2002 11:48 PM
> To: ethmac@opencores.org
> Subject: RE: [ethmac] MAC frame memory
>
>
> You're wrong. There are two fifos in the MAC (for transmit and receive
> frames).
> At the moment each is 8 words big (will probably be changed to 16).
> Transmit starts as soon as the tx fifo is full. As soon as there
> is space in
> the fifo for additional word, it is filled up immediatelly.
>
> When receiving frames: as soon as there is at least one word in the fifo
> it's
> transferred to the memory.
>
> I'm changing the design right now to use bursts and to be able to use
> non-alligned
> memory to store/load data. It's finished but I have troubles with the
> implementation.
>
> Regards,
> Igor
>
>
> > -----Original Message-----
> > From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> > Behalf Of wilton@mail.usa.com
> > Sent: 29. marec 2002 12:56
> > To: ethmac@opencores.org
> > Subject: [ethmac] MAC frame memory
> >
> >
> > Hi,
> >
> > I'm new in network and trying to understand this MAC controller. I was
> > wondering why there is no memory to store the ethernet frame in the
> > MAC controller. It seems to me that if the host want to send out a
> > frame, it just transfer the frame to the controller 32 bits by 32
> > bits. Am
> > I right? If it is, how can the MAC controller ensure to transmit
> > the whole
> > frame continually if there is no frame memory in it?
> >
> > Any comments in this regard are highly appreciated.
> >
> > wilton
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