RE: [ethmac] what is gate size for this?

["Chris Turner" <Chris.Turner@dctl.com>]

We just implemented it in Silicon, 42k gates is the # you're looking for.
Unfortunately, the version we used neccesitates a few not-so-pretty software
workarounds, our softies didn't give us the test coverage we needed (on the
FPGA mock up). The bugs have been rectified since our Silicon was produced
:-)(, so the gate count's probably changed a little. It's around the same
complexity as the Sierra 10/100 MAC.

Regards, Chris.

> -----Original Message-----
> From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]On
> Behalf Of Igor Mohor(opencores)
> Sent: 24 February 2003 16:57
> To: ethmac@opencores.org
> Subject: RE: [ethmac] what is gate size for this?
>
>
> To be honest, I forgot.
>
> Download the core and implement it and you'll see :)
>
> Regards,
> 	Igor
>
> > -----Original Message-----
> > From: owner-ethmac@opencores.org [mailto:owner-ethmac@opencores.org]
> On
> > Behalf Of Jean Kim
> > Sent: Sunday, February 23, 2003 11:40 PM
> > To: ethmac@opencores.org
> > Subject: [ethmac] what is gate size for this?
> >
> >
> > what is gate size for the development in opencore for ethmac?
> >
> > jean
> >
> > --
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