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[Rajesh Pathak <rpathak@cadence.com>]

//module for 10 bit linear feedback shift register
// Primitive polynomial = x^10 + x^3 + 1;
// Reset state = 0000000001

module lfsr10 (clk, rst, out); 

input clk;
input rst;
output [10:1] out;
wire net3;
wire [10:1] x;
wire rstb;
assign rstb = ~rst;
FF U1(x[10], clk, x[1], rstb);
FF U2(x[1], clk, x[2], rst);
FF U3(x[2], clk, x[3], rst);

assign net3 = x[3]^x[10];

FF U4(net3, clk, x[4], rst);
FF U5(x[4], clk, x[5], rst);
FF U6(x[5], clk, x[6], rst);
FF U7(x[6], clk, x[7], rst);
FF U8(x[7], clk, x[8], rst);
FF U9(x[8], clk, x[9], rst);
FF U10(x[9], clk, x[10], rst);
assign out = x;

endmodule

module FF (d, clk, q, rst);
input d;
input clk;
input rst;
output q;
reg q;
always @(posedge clk) begin
if (rst) q=0;
 else q = d;
end
endmodule