[openrisc] is anyone reading or1200?i have some questions to talk about

["qcpassed" <qcpassed@sina.com>]

     or1200_except.v is too difficult for me to understand.
     when exception happens:
    1£© what will happen when the current instruction(ex_insn) is a lsu instruction in delay slot and lsu_unstall is not 	 	   asserted?
	2£© will the result be writen back to rf when current instruction(ex_insn)  writes rf in delay slot?
        by the way,it seems that the result will be writen back to rf,but the epcr will still be set to the branch 		instruction.Then when expection returns the delay slot instruction will  excute again and will write rf again.
	3)etc.
    I have a lot question,does anyone can give me a hand?
 

 				

¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡qcpassed
¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡qcpassed@sina.com
¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡¡2003-04-09




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