[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [openrisc] uclinux ram model in or1k sim.
On Friday 25 July 2003 05:36, Damon Brantley wrote:
> I am attempting to simulate uclinux in or1k sim. I will be loading the
> image directly into ram,
> so I am using the ram model. The problem I am running into is the kernal
> hangs at serial.c line 411.
>
> I did make some changes to the ram.ld to accomodate the size of the binary,
> but nothing that should be
> interfereing with the UART memory locations. The memory is readable and
> shows data present. I also
> made a few changes to the sim.cfg because of the kernel not appearing in
> memory at all.
>
> I was able to successfully run the rom model in the simulator.I did notice
> in the rom model though, the simulator
> would print warnings about nonwritable memory locations when accessing ROM
> memory. I do not see this
> in the ram model. Also in the rom model, unaccessed UART memory locations
> showed unknowns (xx) instead of values.
> I saw hex values for all locations in the ram model
>
> Has anyone else run the uclinux in the ram model in the or1k with success?
Very likely you have done something wrong.
See ATS page under or1k projects on opencores.org, where tools and uclinux
builds daily. There are also scripts how to build everything.
Marko
--
To unsubscribe from openrisc mailing list please visit http://www.opencores.org/mailinglists.shtml