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[pci] PCI comments



Hi,
I have some comments and questions about the PCI core
Note: most of my questions are related to the pci_local block diagram I sent
some time ago which is located now at
www.opencores.org/cores/pci64/pci_local.gif

1) Byte select signals, should they be part of the local address or as extra
bits to it? 
2) how can we use the core and BE in 8 bit IO devices?
3) what about the size of local ADDR FIFO and its depeth. 
4) How can we use the FIFO in the DMA or burst modes, 
5) should we store the first address only and make an incrementer logic for
the start address. in this case we reduce the size of the fifo. but which
block should generate the addresses 
6) if the user is intrested only with small range of addresses so what do you
suggest. should he connect only his addresses to the FIFO or it is done via
the PCI configuration
7) can any one give information about the PCI configuration and its
reflections on the system design.
8) how can we handle the PCI configurations if the user does not want to
change some of them in the run time do we have to fix the values in the
configuration registers or to remove them and to make a block to do this fixed
operation.




pls: replay to khatib@ieee.org

Thanks
Jamil Khatib
OpenIP Organization http:/www.openip.org
OpenIPCore Project  http://www.openip.org/oc
OpenCores  Project  http://www.opencores.org

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