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[pci] testing the core

To: "pci@opencores.org" <pci@opencores.org>
Subject: [pci] testing the core
From: =?GB2312?Q?=D4=F8=D1=DC?= <DARRENTJEN@yeah.net>
Date: Tue, 12 Mar 2002 10:48:18 +0800
Reply-To: pci@opencores.org
Sender: owner-pci@opencores.org

      hello!I am a novice and I need your help in testing Mr.Dolenc and Mr.Markovic's pci core.
      I have isolated target module out from the ip core,but in the same burst read process the third data uses two pci cycles(as described in the jpg file in the attachment).I want to know if the addresses of the two cycles are same or not,and if the two addresses are different,does it mean the result is improper?  
      all your advices are preciated.

burstread.jpg

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