Re: [pci] a simple PCI target module

[sumnow <sumnow@263.net>]

i think signals output to PCI bus should be registered(synchronized) before they actually output to bus, which can prevent glitch on PCI bus. and so do OE signals.

synchronized signals can also benefit synthesis process.

just some opinions and i am also not sure about it.

>Hi there,
>
>A simple PCI revision 2.1 target module has been developed and can be 
>downloaded from www.ntu.edu.sg/home/ezhcai/IPdesign/pcitarget.zip
>
>Any commets are very welcome.
>
>have a nice day,
>
>Cai zhaohui
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