Re: [pci] first day with Modelsim

[ctc-dsl@pacbell.net]

I recently managed to get Modelsim XE Starter 5.5e
to run a GUEST simulation to completion in 30+
hours by making the following changes in two files.

In system.v -- comment out lines 862 & 864-866
If you don't, you'll find pci_tb.log stops growing
during the first hour or so as a two-word read
is retried over and over and over.

In pci_user_constants.v
  -- uncomment line 66 (FPGA)
  -- uncomment line 67 (XILINX)
  -- uncomment line 95 (GUEST)
  -- comment line 96 (HOST)

My pci_tb.log for the run ends saying
Tests performed: 27,700
Failed tests: 0
Successful tests: 27,700

If you need more details,
you may contact me directly
at ctc-dsl@pacbell.net

Bill Siegmund
Cal-Tex Computers, Inc.

P.S.
You should have a copy of
RAMB4_S16_S16.v in your
Xilinx\verilog\src\unisims
directory.
--
To unsubscribe from pci mailing list please visit http://www.opencores.org/mailinglists.shtml