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RE: [oc] compactflash/PCCARD-Interface
Hello!
I've done a Core that attachs a Compact Flash to a Wishbone interface
reading the first file (FAT16) that have been saved on the CF.
It uses two Picoblazes (one for ATAPI-SECTOR PROCESS. and the other for
FAT16 processing) so it´s directly available for
Xilinx devices (now running on a Spartan II). It is very efficient in terms
of area (each picoblaze is less than 50 slices) but probably
the portability to other FPGA will not be easy (for the soft Xilinx Block
Rams are used). The design is fully operational and also
i´ve testbenches for Modelsim. Are you interested in a new project?. At the
moment the documentation is in Spanish (the code
documentation is in English).
Armando
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Armando Astarloa Cuéllar - Universidad del Pais Vasco UPV/EHU
Tecnología Electrónica
Departamento de Electrónica y Telecomunicaciones
Escuela Superior de Ingenieros - Email: jtpascua@bi.ehu.es
Ald. de Urquijo s/n Tel.: 34 - 94 - 601 73 04
48013 BILBAO (SPAIN) Fax.: 34 - 94 - 601 42 59
----------------------------------------------------------------------------------------------------------------------
At 08:08 04/08/2003 +0800, you wrote:
>Hello! I'm also interested in this code. Could you please send me also a
>copy? I'm partly involved in a CF project right now, although of the CF
>host. If you'd like to start a project, I'm willing to help. Thanks!
>
> > -----Original Message-----
> > From: owner-cores@opencores.org
> > [mailto:owner-cores@opencores.org] On Behalf Of Henchinski
> > Sent: Monday, August 04, 2003 12:52 AM
> > To: cores@opencores.org
> > Cc: scyx@directbox.com
> > Subject: Re: [oc] compactflash/PCCARD-Interface
> >
> >
> > Hi all
> > this is a general description of the FPGA CompactFlash
> > interface, The host is Intel PXA processors (Bulverde) and
> > accessed the CF via FPGA.
> >
> > I believe that the number of wait state for CompactFlash
> > memory/io modes are set
> > in the CPU, if desired we can add a Ready logic to hold
> > the CPU as needed.
> > and that IOW,WE,OE and IOR are generated from the CPU OE, WE and A
> > ( need to verify )
> >
> > The FPGA have 2 GPIO
> > - Control for CF_EN, CF_RST
> > - Status for CF_VS1, CF_VS2, CF_BVD1, CF_BVD2, CF_NFAULT,
> > CF_NIRQ, CF_CD
> >
> > --------------------------
> > -- Compact Flash Interface
> > --------------------------
> > D <= CF_D when CF2_DIR= '1' else "ZZZZZZZZZZZZZZZZ";
> > CF_D <= D when CF2_OE= '1' else "ZZZZZZZZZZZZZZZZ";
> > CF_A <= A (10 downto 0) when CF_EN = '1' else "ZZZZZZZZZZZ";
> >
> > -- CF CONTROL BUS
> > CF_OE <= (IOW or WE);
> > CF_DIR <= (OE or IOR);
> >
> > If you guys think we should start a new project on Opencores
> > that will include HW and Driver, please mail me your requirements.
> >
> >
> >
> >
> >
> > ----- Original Message -----
> > From: "Vic" <vikrantps@yahoo.com>
> > To: <cores@opencores.org>
> > Sent: Saturday, August 02, 2003 9:50 PM
> > Subject: Re: [oc] compactflash/PCCARD-Interface
> >
> >
> > > Please do so. I am working in vhdl. Hence also
> > > interested in learning more about interfacing Compact
> > > Flash card with FPGAs.
> > >
> > > thanks,
> > > Vic.
> > > --- Henchinski <kaliski@bezeqint.net> wrote:
> > > > In my previous project, we mapped the CompactFlash
> > > > Card on the CPU (
> > > > StrongArm ) Memeory address
> > > > we used an FPGA to do some basic translation, no
> > > > memeory was needed, just
> > > > the some control signals
> > > > were generated and it works
> > > >
> > > > If you would like the code I will attach it
> > > >
> > > > Y
> > > >
> > > >
> > > > ----- Original Message -----
> > > > From: <scyx@directbox.com>
> > > > To: <cores@opencores.org>
> > > > Sent: Friday, August 01, 2003 9:05 PM
> > > > Subject: [oc] compactflash/PCCARD-Interface
> > > >
> > > >
> > > > > I'm looking for an interface for producing a
> > > > PCCARD or CompactFlash-
> > > > > Card. Many vhdl-implemention for Host-Interfaces I
> > > > found. But nothing
> > > > > for the cardside-Interface.
> > > > > Maybe the best solution is a cardinterface which
> > > > included some memory
> > > > > (appr. 2048 bit) and my hardware has access to
> > > > this memory.
> > > > > Host (reading/writing) -> PCCARD ->Memory(on card)
> > > > <- my vhdl-code
> > > > > (reading/writing)
> > > > > Anybody has some ideas?
> > > > > thanx
> > > > > --
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