Re: [oc] What kind of Algorithm level code can be synthesised?

[MICHAEL M DELANEY <mmdst23+@pitt.edu>]

Would it be better to do something like use a processer of some sort, and
program it for the higher level stuff?  I generally try to keep my VHDL
code as close to possible as a hardware schematic would be (but then again
I haven't been able to do much hardware design in VHDL either, so I
can't really say that my way works better).  The issue is that eventaully
you're code will be converted into a hardware layout somewhere/somehow.
Its probally simular to compiler design, but even more painfull, so I
don't really want to know. :)
later,
Mike

On Tue, 13 Nov 2001, zeyaohan wrote:

> Hello, everyone:
>
> 	I am puzzling at what kind of algorithm level hdl code can be synthesised and what kind of them can not?
> 	For example, designing FFT/IFFT processor, can i directly transfer C algorithm to hdl algorithm level description (behavior) and then let it be synthesised, or it can not be synthesised? For i think the Radix 4 and split Radix algorithm is complex and synthesis tools can not build specific memory and registers and control logic for them. How do you think about?
> 	And another example, designing FIR or IIR, i think whether i can only use formula to construct the algorithm level hdl code or need i describe detailed RTL level hdl code to be synthesised?
> 	And other examples, such as virtebi coder and decoder and reed-solomon coder and decoder.
> 	And such as DCT(discrete cosine transform), wavelet transform, and other digital signal processing algorithm?
>
>
> Best Regards!
>             zeyaohan
>             zeyaohan@263.net
>
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