Re: [oc] SoC bus review

[John Dalton <johnd@southern-poro.com>]

Thanks for this document Rudi.  It made an interesting read.  Can you
include a reference section with URLs for the relevant standards?

Comments on AMBA:  The ASB has been superseded by the AHB, thus the
ASB should not be considered as part of a new specification.

If the IBM CoreConnect bus requires licensing from IBM, then it is not free
in the sense of intellectual freedom.  It is only free as in free beer.

The SoC busses seen to be microprocessor-centric.  How suited are they
for point-to-point applications?  For example, connecting dedicated
signal processing blocks, such as ADCs, DACs, FFTs, etc., together.


Along a similar vein, I've been looking at defining a module standard
for connecting FPGAs together (in connection with a modular FPGA system).
This work is closely connected with SoC issues, as it makes sense that any
FPGA module system should be able to 'wrap around' the SoC bus, allowing
the SoC bus to bridge between FPGAs.

So far, all I've decided is that each FPGA module should include two sets of
JTAG
signals.  One for configuration, one for testing and emulation.  Any more
suggestions?  Maybe this is sufficient.  All other signals should be 'user
defined',
with the SoC specification forming the next level down in the FPGA module
specification.

Regards
John Dalton