[oc] Memory controller, Ahb/apb bridge

["Dharmeshbhai PATEL" <dpatel@ifrance.com>]

Hi list,

I would like to make an multiport memory controller interface
which interface with AMBA AHB bus. If anyone have some model
I'm interested by (Documentation,verilog vhdl source code,testbench..)

For example Memory controller from ARM Primcell.

I also want to make ahb/apb bridger. If Any one have somethins about 
I'm also interested by(design spec,Code source VHDL,Verilog) 

thaks in advance.

 
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