Re: [oc] SDRAM controller

[Daniel Haensse <daniel.haensse@alumni.ethz.ch>]

Thanks, Steve

Dani

Am Montag, 22. April 2002 21.52 schrieben Sie:
> Just a quick note - as I recall the 186 has something like 1/2Mbyte of
> address space that it can decode for external access, so you'll have to use
> a page register system to get 8Mb of space. The only question that you need
> to ask is - what is the smallest FPGA that I can drop the open-cores design
> into?  There is your cost. The design is already done except for adapting
> it to the 186.
>
> Steve Wilson
>
> Daniel Haensse wrote:
> > Hi list,
> >
> > how much would it cost to build an SDRAM controller with an FPGA to work
> > on an 80186. We would need 8MB of SDRAM.
> >
> > Thanks Dani
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