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[oc] Verilog 2001 and SystemVerilog
Aloha!
Since there has been such huge discussions about different HDL:s, what
features are available in which language, what the future might entail etc, I
thought I should post a few references to some good introductory material on
both Verilog 2001 and SystemVerilog.
An overview of SystemVerilog 3.1 (Stuart Sutherland, EE Times)
http://www.eedesign.com/story/OEG20030521S0086
Verilog 2001 Presentation Slides (from HDL Con, by Stuart Sutherland)
http://www.verilog-2001.com/verilog-2001_presentation.pdf
Verilog-2001: What's New: (Stuart Sutherlands White Paper)
http://img.cmpnet.com/eedesign/features/Verilog-2001_paper.pdf
Happy reading!
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Med vänlig hälsning, Yours
Joachim Strömbergson - Alltid i harmonisk svängning.
VP, Research & Development
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