[ethmac] AMBA interface glue logic

["C.T.Lin" <ctlin@kcg.seed.net.tw>]

Hi, Igor
    I am planning to adapt wishbone ethernet core to AMBA interface.
    It seems easy to map Registers and Buffer descriptors directly to AMBA APB bus.
  While the Wishbone master part mapped to AMBA AHB master.
  But there exist a little problem about the APB bus, because it has not any handshake or waitstate.
  For Registers it's fine. But for Buffer Descriptors, the current design use a single port ram which
  make the timing unpredictable in wishbone. I think it will be much simple if dual port ram is used( a delicate
  port for wishbone and the other for RX and TX). What's your comment?


  Best regard!
                           Chang-Tsun Lin


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