I know
that there are some difficulties regarding this and I'm already solving them. At
the moment I'm using
25 MHz
for both MTxClk and WB_CLK.
Thanks.
Igor
-----Original Message----- From: owner-ethmac@opencores.org
[mailto:owner-ethmac@opencores.org]On Behalf Of joe
qiao Sent: 19. avgust 2002 12:22 To:
ethmac@opencores.org Subject: [ethmac] the problem of TxStartFrm
generation
I suspect that the generation of TxStartFrm may
have problem when the period of MTxClk is greater than 2*period of WB_CLK in
eth_wishbone.v.