Re: [openrisc] Bug in current or1k sim...

["Damjan Lampret" <lampret@opencores.org>]

----- Original Message -----
From: "Chris Ziomkowski" <chris@asics.ws>
To: <openrisc@opencores.org>
Sent: Sunday, May 27, 2001 4:22 PM
Subject: [openrisc] Bug in current or1k sim...


> There appears to be a bug in the current version of
> or1ksim. The scenario is as follows: in the reset()
> routine or the except_handle() routine, both pc and
> pcnext are set to the same value. If the next instruction

Very likely because this was written at the time when exception interface
wasn't defined for OR1K. Please just crorrect it.

regards,
Damjan