Re: [openrisc] cpu extensibility

[Marko Mlinar <markom@opencores.org>]

On Friday 06 June 2003 22:34, paul wrote:
> Hi
>
> Does the current OPENRISC structure (implementation), make adding new
> instructions easy?
> What I have in mind is to add instructions that can't be done in few
> cycles but a lot of cycles.
> Specifically, can I add a new instruction say -- that would do big
> number multiplication , or do operations on a big chuck of memory, etc?
> The C compiler don't have to know about the instructions, it will be
> embedded assembly codes in C code.
> Can it be done easily?
> Thanks.

Actaully there was quite some effort made to make this really easy. For 
example, you should download gen_or1kisa modify instruction descriptions 
there (string based) and add a new function in or1ksim. There you can easily 
specify the behaviour and clock cycles it has to take.
Regerding the compiler and assembler the easiest way is to create a macro that 
generated e.g. asm ("word 0x3442355") where hex number is generated.

You have different custom instruction spaces availabe l.cust[1-8], choose the 
one, that allows you less decoding. Of course you can put many instruction in 
one l.cust instruction space.

If you are doing more complex operation, which should be execute in parallel 
consider using an openrisc unit (e.g. timer as specified in architecture 
manual is one).

best regards,
Marko


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