RE: [openrisc] need help with boot strategy

["Robert Cragie" <rcc@jennic.com>]

As you say, it depends very much on your system.

I can think of three possible approaches (there are no doubt more), which
are as follows:

1) Make the CPU RAM dual-ported. Then use an external micro or host to hold
the CPU in reset and write the contents of the CPU's code and initialised
data into the CPU RAM. Then release the reset line.
2) Code a simple bootstrapper/monitor into CPU ROM which can load the CPU
RAM from an external source and switch memory maps after it has loaded.
3) Make a hardware bootstrapper which can hold the CPU in reset, load the
CPU RAM from an external source and release the reset line.

(1) is a suitable approach for a development platform where the FPGA CPU is
hosted by another CPU, for example, a PCI card hosted by a PC.
(2) is more appropriate for an embedded platform where the external source
maybe a serial EEPROM (which will still need to be programmed somehow) or a
serial line communicating via XMODEM or something similar. eCos Redboot is
an example of this sort of system.
(3) is a similar approach to (1) but uses an active hardware bootstrapper to
control the loading as opposed to a host CPU.

This may at least get you thinking on what is appropriate for your platform.

Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT,  UK
http://www.jennic.com  Tel: +44 (0) 114 281 2655
_______________________________________________________________

> -----Original Message-----
> From: owner-openrisc@opencores.org
> [mailto:owner-openrisc@opencores.org]On Behalf Of paul
> Sent: 09 June 2003 01:28
> To: openrisc@opencores.org
> Subject: [openrisc] need help with boot strategy
>
>
> Hi
>
> I know boot strategy is always board dependent and an engineering issue.
> But I hope more experienced engineer can give me an idea of what's
> usually done.
>
> Here is the problem:
> Assuming I have already a way to program a FPGA (CPU) and switch it on.
> "First" : I shall to need to put some boot codes in RAM before the CPU
> can start executing.
> Should I code "First" in the FPGA (CPU) or
> somehow have done "First" and switch on the FPGA afterward?
>
> What is usually done in these cases? Thanks.
>
>
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