[openrisc] or1200 compilation problem

[paul <paulw@mmail.ath.cx>]

Hi

-- I've commented out (//'define OR1200_XILINX_RAM32X1D ) in 
or1200_defines.v --
Can someone help with this error: (in  or1200_tpram_32x32.v)

@E: or1200_tpram_32x32.v(326): Only one always block may assign a given variable mem @E:"c:\or1200\rtl\verilog\or1200_tpram_32x32.v":326:13:326:16

//
// Generic RAM's registers and wires
//
reg	[dw-1:0]	mem [(1<<aw)-1:0];	// RAM content
reg	[dw-1:0]	do_reg_a;		// RAM data output register
reg	[dw-1:0]	do_reg_b;		// RAM data output register

This is the only error left. 


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