[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[pci] PCI Master & Target access

To: <pci@opencores.org>
Subject: [pci] PCI Master & Target access
From: "Sangmoon Kim" <dogoil@etinsys.com>
Date: Sat, 9 Aug 2003 13:16:36 +0900
Reply-To: pci@opencores.org
Sender: owner-pci@opencores.org

Hi,

I'm developing a PCI-VME bridge using the opencoreas' PCI core.

I get some data errors if other VME master accesses VME bus (wb_master) while PCI side (wb_slave) accesses VME bus.

Does any one had the problem?

Thank you in advance.

Regards,

Sangmoon Kim

Follow-Ups:
- Re: [pci] PCI Master & Target access
  - From: "Sangmoon Kim" <dogoil@etinsys.com>

Prev by Date: [pci] #`FF_DELAY statements in pci_out_reg.v
Next by Date: [pci] confidential
Prev by thread: [pci] confidential
Next by thread: Re: [pci] PCI Master & Target access
Index(es):
- Date
- Thread